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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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NTP53X2 датащи(PDF) 33 Page - NXP Semiconductors |
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NTP53X2 датащи(HTML) 33 Page - NXP Semiconductors |
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33 / 133 page  NXP Semiconductors NTP53x2 NTAG 5 link - NFC Forum-compliant I2C bridge NTP53x2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 3.3 — 3 July 2020 COMPANY PUBLIC 544533 33 / 133 Table 39. Configuration Definition (CONFIG_2) Bit Name Value Description 00b Receiver disabled 7 01b Plain input with weak pull-up 10b Plain input 6 GPIO1_IN 11b Plain input with weak pull-down (Default) 00b Receiver disabled (Default) 5 01b Plain input with weak pull-up 10b Plain input 4 GPIO0_IN 11b Plain input with weak pull-down (Default) 0b Extended commands are disabled 3 EXTENDED_COMMANDS_ SUPPORTED 1b Extended commands are supported (Default) 0b Lock block commands are disabled 2 LOCK_BLOCK_ COMMAND_SUPPORTED 1b Lock block commands are supported (Default) 0b Low Speed GPIO 1 GPIO1_SLEW_RATE 1b High Speed GPIO (Default) 0b Low Speed GPIO 0 GPIO0_SLEW_RATE 1b High Speed GPIO (Default) 8.1.3.14 Synchronization Block These bytes define the block address of the user memory being a terminator block. Whenever there is read or written to the block address as specified in SYNCH_DATA_BLOCK from the NFC interface the respective status bit is set. And also ED pin is set accordingly if configured to detect SYNCH_DATA_BLOCK access. Table 40. Synchronization Block Bytes Location (SYNCH_DATA_BLOCK) Block Address NFC I2C Byte 0 Byte 1 Byte 2 Byte 3 38h 1038h SYNCH_DATA_ BLOCK (LSB) SYNCH_DATA_ BLOCK (MSB) RFU Table 41. Synchronization Block Register Bytes Location (SYNCH_DATA_BLOCK_REG) Block Address NFC I2C Byte 0 Byte 1 Byte 2 Byte 3 A2h 10A2h SYNCH_DATA_ BLOCK_REG (LSB) SYNCH_DATA_ BLOCK_REG (MSB) RFU 8.1.3.15 Pulse Width Modulation and GPIO configuration These configuration bytes define the various configuration bits for GPIO/PWM use case (see Section 8.1.3.13). All features can be configured from NFC and I2C perspective as long NTAG 5 link is configured for slave mode. For details refer to Section 8.3.3 and Section 8.3.4. |
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