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NTP53X2 датащи(PDF) 29 Page - NXP Semiconductors |
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NTP53X2 датащи(HTML) 29 Page - NXP Semiconductors |
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29 / 133 page ![]() NXP Semiconductors NTP53x2 NTAG 5 link - NFC Forum-compliant I2C bridge NTP53x2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 3.3 — 3 July 2020 COMPANY PUBLIC 544533 29 / 133 Table below shows the location of the I2C Key Header Configuration in the configuration memory: Table 30. I2C Key Header (I2C_KH) location Block Address NFC I2C Byte 0 Byte 1 Byte 2 Byte 3 30h 1030h I2C_KH RFU Table 31. I2C Key Header Values Value Status Description 81h Not active (default) The related I2C passwords, I2C Protection Pointer and I2C Protection Pointer Condition can be read and written with the I2C READ and I2C WRITE commands. The related password is not active and cannot be used. C3h Active The I2C passwords are active. After authentication with write key the I2C_PP, I2C_PPC and Key header can be written and I2C Keys can be read or written. E7h Active and locked The I2C key is active and locked and cannot be modified any longer. The related key cannot be read or written with the I2C READ or I2C WRITE command. The I2C_PP and I2C_PPC can be read with the READ command, but writing with the WRITE command is not possible any longer. all other Disabled Key is disabled and cannot be used 8.1.3.11 I2C Protection Pointer and Condition The I2C Protection pointer (I2C_PP) defines the address of the user memory where the user memory below PP_AREA_1 is divided into AREA_0-L and AREA_0-H, two arbitrarily sized sections with independent access conditions, which are defined by condition byte (I2C_PPC). The NFC interface can access this configuration block with READ CONFIG and WRITE CONFIG commands if not locked by NFC section lock. Table 32. I2C Protection Pointer and Configuration location Block Address NFC I2C Byte 0 Byte 1 Byte 2 Byte 3 31h 1031h I2C_PP I2C_PPC RFU RFU The protection pointer address (I2C_PP) defines the base address where the user memory below PP_ARA_1 is divided into higher and lower sections. • The memory address below protection pointer address is called I2C AREA_0-L. • The memory address above and including protection pointer address is called I2C AREA_0-H • I2C AREA_0-H ends, where AREA_1 starts. Note it is the same position (PP_AREA_1) as from NFC perspective (see Section 8.1.3.24). Below is an example where the memory is divided into to areas with I2C_PP address set to 0050h. In this example PP_AREA_1 is pointing outside the user EEPROM, which means I2C AREA_0-H ends at the end of the user memory. Default value of I2C_PP is FFh. |
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