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AS7000 датащи(PDF) 46 Page - ams AG |
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AS7000 датащи(HTML) 46 Page - ams AG |
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46 / 92 page ![]() Page 46 ams Datasheet Document Feedback [v1-12] 2018-Feb-26 AS7000 − Detailed Description Electrical Analog Front End The electrical analog front end consists of three identical signal paths with independent settings of bias condition, gain and offset. Figure 56: Electrical Analog Front End Internal Circuit Note(s): 1. Resistor / T-gates resistance values are given as indication – do not rely on absolute values Input Pins Five general purpose pins can be used either as configurable GPIO for the processor or as analog input pins for the electrical analog front end. The analog inputs can be configured to setup different amplifier topologies. GPIO0 GPIO1 GPIO6 GPIO5 GPIO4 VDD 00b … off 01b … 10µ A 10b … 100µA 11b … 1mA gpio_bias_current gpio_i_bias gpio_dac gpio_r_bias 160kΩ gpio_gst_in measure_dac T-gates: 50kΩ T-gates: 250Ω 50kΩ T-gates: 10kΩ gst_gain 0 … 1x 1 … 2x 2 … 4x 3 … 8x 4 … 16x 5 … 32x 6 … 64x 7 … don’t use 3 2 1 0 AGND gst_ref SIGREF don’t use 128kΩ gpio_gst_in measure_dac on ADC Vref=1.6V AGND adc_sel=2 dac_value sigref_on_dac_buf 0 1 SIGREF opamp & DAC enabled automatically 1.9V DAC |
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