 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
AS7000 датащи(PDF) 57 Page - ams AG |
|
|
|||||||||||||||||||||||||||||
AS7000 датащи(HTML) 57 Page - ams AG |
|
|
57 / 92 page  ams Datasheet Page 57 [v1-12] 2018-Feb-26 Document Feedback AS7000 − Detailed Description 19:17 adc_settling_ time 5RW ADC settling time: Do not use in interleaved mode. It defines the number of ADC clock cycles the sampling window is kept open additionally to its 4 ADC clock cycles. If the gain stage in the optical frontend is used (gain_ byp=0), set this to minimum 8μs. If adc_selfpd=1, set this to minimum 64μs and set adc_discharge=1. Setting Periods μs (@4MHz) μs (@2MHz) μs (@1MHz) 0 0 000 1 4 124 2 8 248 316 4 8 16 432 8 16 32 564 16 32 64 6 128 32 64 128 7 256 64 128 256 If adc_discharge=0 and adc_selfpd=0 and the TIA is connected directly to the ADC using following minimum settling times: pd_ampres minimum adc_settling_time 1MΩ 1μs 2MΩ-7MΩ 2μs 10MΩ-15MΩ 3μs 0xa4: AFE_ADC_CFG Field Name Rst Type Description |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
