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K32L3A датащи(PDF) 13 Page - NXP Semiconductors |
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K32L3A датащи(HTML) 13 Page - NXP Semiconductors |
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13 / 162 page ![]() • Automatic detection of the active peripheral • Ability to disable any peripheral • LPUART peripheral implements autobaud • Common packet-based protocol for all peripherals • Packet error detection and retransmission • Flash-resident configuration options • Fully supports internal flash security, including ability to mass erase or unlock security via the backdoor key • Protection of RAM used by the bootloader while it is running • Provides command to read properties of the device, such as flash and RAM size • Multiple options for executing the bootloader either at system start-up or under application control at runtime • Supports internal flash • Supports encrypted image download • ROM boots from either M4 (Default) or M0+ by configuring to FOPT IFR (record Index 0x84) 2.1.8 Clock options This chip provides a wide range of sources to generate the internal clocks. These sources include internal reference clock (IRC) oscillators, external oscillators, external clock sources, ceramic resonators, and frequency-locked loop (FLL). These sources can be configured to provide the required performance and optimize the power consumption. The IRC oscillators include the fast internal reference clock (FIRC) oscillator, the slow internal reference clock (SIRC) oscillator, and the low power oscillator (LPO). The fast internal resistor capacitor (FIRC) oscillator generates a clock ranging between 48 MHz and 60 MHz. The slow internal resistor capacitor (SIRC) oscillator generates clock at either 8 MHz or 2 MHz. It can serve as the low power, low speed system clock under very low power run (VLPR) mode or very low power wait (VLPW) mode. It can also be provided as clock source for other on-chip modules. The SIRC cannot be used in any VLLS modes. The LPO generates a 1 kHz clock and default to be off in VLLS0 but can be enabled by configuring bits of SPM_CORELPCNFG[LPOEN] and SPM_CORELPCNFG[ALLREFEN]. Overview K32L3A, Rev. 1, 09/2019 13 NXP Semiconductors |
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