K32L3A datasheet(96/162 Pages) NXP

96 / 162 page

Table 65. Power consumption operating behaviors in regulator mode (continued)

Symbol

Description

Temp

(°C)

Active

core

LDO

(VDD_DCDC=3V)

DCDC

(VDD_DCDC=3.3V

)

Unit

Notes

Typ.

Max

Typ.

Max

5.657

6.222

3.444

3.789

0 & 1

10.212

11.234

5.654

6.219

IDD_DCDC

Active core in high speed

RUN Inactive core in

STOP while (1) loop. All

peripheral clocks

disabled. Execution from

flash Core VDD = 1.4 V.

Core clock = 72 MHz

10.218

11.240

5.975

6.573

5.338

5.872

3.562

3.919

0 & 1

12.814

14.096

7.210

7.931

10.563

11.620

6.183

6.801

5.660

6.226

3.732

4.105

0 & 1

13.199

14.518

7.438

8.182

11.073

12.181

6.425

7.068

6.118

6.730

3.947

4.342

0 & 1

13.691

15.060

7.685

8.454

105

12.068

13.275

7.053

7.759

7.087

7.796

4.534

4.988

0 & 1

14.687

16.156

8.338

9.172

IDD_DCDC

Active core in high speed

RUN Inactive core in

STOP while (1) loop All

peripheral clocks enabled

Execution from flash

Core Vdd = 1.4V Core

clock = 72MHz

12.819

14.101

7.215

7.937

7.439

8.183

4.512

4.963

0 & 1

17.301

19.031

9.420

10.362

13.214

14.535

7.448

8.193

7.792

8.571

4.712

5.183

0 & 1

17.755

19.531

9.703

10.673

13.736

15.109

7.705

8.476

8.270

9.097

4.932

5.425

0 & 1

18.249

20.073

9.975

10.972

105

14.777

16.255

8.373

9.211

9.285

10.214

5.554

6.109

0 & 1

19.331

21.264

10.688

11.757

IDD_DCDC

Active core in high speed

RUN Inactive core in

STOP, Compute

Operation Execution from

flash Core Vdd = 1.4V

Core clock = 72MHz

9.474

10.422

5.592

6.152

4.635

5.098

3.205

3.525

0 & 1

11.935

13.128

6.752

7.428

9.829

10.812

5.795

6.374

4.966

5.463

3.373

3.711

0 & 1

12.315

13.546

6.980

7.678

10.319

11.350

6.032

6.635

5.394

5.933

3.584

3.942

0 & 1

12.807

14.087

7.226

7.949

105

11.309

12.440

6.655

7.320

Table continues on the next page...

Electrical characteristics

K32L3A, Rev. 1, 09/2019

NXP Semiconductors

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