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TLE8110ED датащи(PDF) 62 Page - Infineon Technologies AG

номер детали TLE8110ED
подробное описание детали  Smart Multichannel Low Side Switch with Parallel Control and SPI Interface
PDF  74 Pages
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производитель  INFINEON [Infineon Technologies AG]
домашняя страница  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

TLE8110ED датащи(HTML) 62 Page - Infineon Technologies AG

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Data Sheet
62
Rev. 1.0
2018-03-07
TLE8110ED
Smart Multichannel Low Side Switch with Parallel Control and SPI Interface
Control of the device
Command description
Field
Bits
Type
Function
DCC_DRA
[11:0]
W
DRA - Diagnosis Register A (see Chapter 12.3.2.1)
Read out Diagnosis Register A. Return the contents in the next SPI
frame (see Chapter 12.3.2.2).
DCC_DRB
[11:0]
W
DRB - Diagnosis Register A (see Chapter 12.3.2.1)
Read out Diagnosis Register B. Return the contents in the next SPI
frame (see Chapter 12.3.2.2).
DCC_DRACL [11:0]
W
DRACL - Diagnosis Register A Clear
Clear the contents of the Diagnosis Register A. Return the content
present before the clear in the next SPI Frame. If the Diagnosis Error
Remains, the Information remains (see Chapter 12.3.2.2).
DCC_DRBCL [11:0]
W
DRBCL - Diagnosis Register B Clear
Clear the contents of the Diagnosis Register B. Return the content
present before the clear in the next SPI Frame. If the Diagnosis Error
Remains, the Information remains (see Chapter 12.3.2.2).
DCC_DMSCL [11:8]
W
DMSCL/OPSx - Diagnosis Mode Set, Clear / Output Pins Set
On sending this command, the diagnosis registers DRA, DRB as well
as the “virtual” Diagnosis Output Registers DO[7:0] (see
Chapter 12.3.2.3) are cleared. Output Pin Settings are done
according the content of OPSx.
Returns the contents of cleared DR2 on SO in the 2nd byte of the
actual communication frame and the Output Pin Feedback in
the 1st Byte of the next frame (see Chapter 12.3.2.3).
DCC_DMS1
[11:8]
W
DMS1/OPSx - Diagnosis Mode Set, Register1 / Output Pins Set
On sending this command, the diagnosis registers DR1 is selected.
Output Pin Settings are done according the content of OPSx.
Returns the contents of DR1 on SO in the 2nd byte of the actual
communication frame and the Output Pin Feedback in the 1st Byte
of the next frame (see Chapter 12.3.2.3).
DCC_DMS2
[11:8]
W
DMS2/OPSx - Diagnosis Mode Set, Register2 / Output Pins Set
On sending this command, the diagnosis registers DR2 is selected.
Output Pin Settings are done according the content of OPSx.
Returns the contents of DR2 on SO in the 2nd byte of the actual
communication frame and the Output Pin Feedback in the 1st Byte
of the next frame (see Chapter 12.3.2.3).
DCC_DMS3
[11:8]
W
DMS3/OPSx - Diagnosis Mode Set, Register3 / Output Pins Set
On sending this command, the diagnosis registers DR3 is selected.
Output Pin Settings are done according the content of OPSx.
Returns the contents of DR3 on SO in the 2nd byte of the actual
communication frame and the Output Pin Feedback in the 1st Byte
of the next frame (see Chapter 12.3.2.3).



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