TLE8110ED datasheet(45/74 Pages) INFINEON

45 / 74 page

Data Sheet

Rev. 1.0

2018-03-07

TLE8110ED

Smart Multichannel Low Side Switch with Parallel Control and SPI Interface

Control of the device

12.2.3.2 2x8-bit protocol

Each Cycle where a serial data or command frame is sent to the S_SI of the SPI interface, a data frame is

returned at the same time by the S_SO. The content of the S_SO frame is dependent of the previous command

which has been sent to S_SI and the content of the actual content of S_SI: The first Upper Byte send to S_SI

controls the content of the Lower Byte actual returned by S_SO. The Lower Byte send to S_SI controls the

Lower Byte in S_SO of the next frame (see Figure 28).

Figure 28

2x8-bit protocol

S_SI Serial Input

987

6543

210

Upper Byte

Lower Byte

S_SO Serial Output

Reset value: xxxx xxxx xxxx xxxxB1)

1) after reset a Short Diagnosis and Device Status CMD_CSDS response is sent, see

Chapter 12.3.1.2.

987

6543

210

Upper Byte

Lower Byte

Bit description

Field

Bits

Type

Function

S_SI Serial Input

Upper Byte

[15:8]

Upper Byte

Contains the command, which is performed after sending 8 bit to

S_SI. The action out of this command is affecting the Lower Byte of

S_SO of the actual communication frame.

Lower Byte

[7:0]

Lower Byte

Containsthe command and data, which is performed at the end of

the actual communication frame. The action out of this command

is affection the Upper Byte of S_SO of next communication frame.

DMSx

S_CS

S_SI

S_SO

SPI_Protocol_Short_Mode.vsd

OPSx

Upper

Byte

Upper

Byte

Lower

Byte

OPF

Lower

Byte

Upper

Byte

Lower

Byte

Upper

Byte

Lower

Byte

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