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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TLE8110ED датащи(PDF) 39 Page - Infineon Technologies AG |
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TLE8110ED датащи(HTML) 39 Page - Infineon Technologies AG |
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39 / 74 page  Data Sheet 39 Rev. 1.0 2018-03-07 TLE8110ED Smart Multichannel Low Side Switch with Parallel Control and SPI Interface 16 bit SPI Interface 11 16 bit SPI Interface 11.1 Description 16 bit SPI Interface The diagnosis and control interface is based on a serial peripheral interface (SPI). The SPI is a full duplex synchronous serial slave interface, which uses four lines: S_SO, S_SI, S_CLK and S_CS. Data is transferred by the lines S_SI and S_SO at the data rate given by S_CLK. The falling edge of S_CS indicates the beginning of a data access. Data is sampled in on line S_SI at the falling edge of S_CLK and shifted out on line SO at the rising edge of SCLK. Each access must be terminated by a rising edge of S_CS. A modulo 8 counter ensures that data is taken only, when a multiple of 8 bit has been transferred. If in one transfer cycle not a multiple of 8 bits have been counted, the data frame is ignored. The interface provides daisy chain capability. Figure 24 16 bit SPI Interface The SPI protocol is described in Chapter “Control of the device”. Concerning Reset of the SPI, please refer to the chapter “Reset”. 11.2 Timing Diagrams Figure 25 SPI timing diagram 14 13 12 11 14 13 12 11 MSB MSB LSB 6 5 4 3 2 1 LSB 6 5 4 3 2 1 10 9 8 10 9 8 7 7 S_SO S_SI S_CS S_CLK time SPI.vsd S_CS S_CLK S_SI t CS lead t CStd t CSlag t SCLKh t SCLKl t SCLKp t SIsu t SIh S_SO t SOdis 0.7Vdd 0.2Vdd 0.7Vdd 0.2V dd 0.7Vdd 0.2Vdd 0.7Vdd 0.2Vdd Timing SPI.vsd t SOv t SO(en) |
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