SSL4120T datasheet(14/47 Pages) NXP

14 / 47 page

SSL4120T

All information provided in this document is subject to legal disclaimers.

Objective data sheet

Rev. 1 — 21 June 2012

14 of 47

NXP Semiconductors

SSL4120T

Resonant power supply control IC with PFC

In applications where the SSL4120T is supplied from a separate DC source (e.g. a

standby supply), the SSL4120T will not automatically stop switching if an error condition

causes the output voltage to fall. For this reason, the SSL4120T outputs are provided with

undervoltage protection (UVP output; see Section 7.9). A UVP output event will restart the

IC if VSNSOUT drops below Vuvp(SNSOUT) (typ. 2.3 V).

During start-up, the output voltage will be below Vuvp(SNSOUT) for a time. This should not

be considered an error condition provided it doesn’t last longer than expected. For this

reason, the protection timer is started as soon as VSNSOUT drops below Vuvp(SNSOUT). The

Restart state is activated if the UVP output event is still active once the protection time has

expired.

7.5.6 OverTemperature Protection (OTP)

Accurate internal overtemperature protection is provided in the SSL4120T. When the

junction temperature exceeds the overtemperature protection activation temperature, Totp

(typ. 150

°C), the IC will go to the Thermal hold state. The SSL4120T will exit the Thermal

hold state when the temperature falls again, to around 10

°C below Totp.

7.6 Burst mode operation (pin SNSOUT)

The HBC and PFC controllers can be operated in Burst mode. In Burst mode the

controllers will be on for a period, then off for a period. Burst mode operation increases

efficiency under low-load conditions.

A low-load condition can be detected using a simple external circuit that makes use of the

information from the feedback loop or from the average primary current. The detection

circuit can pull down pin SNSOUT to pause operation of the SSL4120T for a burst-off

time. Both controllers, or only the HBC controller, can be paused during the burst-off time:

• Burst-off level for HBC, Vburst(HBC) (typ. 1 V).

When VSNSOUT drops below Vburst(HBC), operation of the HBC controller will be

suspended. Both the high-side and the low-side power switches will be off. The PFC

continues to operate normally. When VSNSOUT rises above Vburst(HBC) again, the HBC

controller will resume normal operation, without executing a soft start sequence.

• Burst-off level for PFC, Vburst(PFC) (typ. 0.4 V).

When VSNSOUT drops below Vburst(PFC), operation of the PFC controller will also be

suspended (the HBC will have been paused already). When VSNSOUT rises above

Vburst(PFC) again, the PFC controller will resume normal operation via a PFC soft start

(see Section 7.7.6).

To ensure Burst mode is not activated before the output voltage becomes valid, a current

from the SNSOUT pin (typ. 100

μA) will hold VSNSOUT at Vpu(SNSOUT), which is above both

burst levels. The resistance between the SNSOUT pin and ground should therefore be

greater than 20 k

Ω.

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