SSL4120T datasheet(30/47 Pages) NXP

30 / 47 page

SSL4120T

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Objective data sheet

Rev. 1 — 21 June 2012

30 of 47

NXP Semiconductors

SSL4120T

Resonant power supply control IC with PFC

The protection timer is also started. The Restart state is activated when the OCR-HBC

condition is still present after the protection time has elapsed.

7.8.10.3

Overcurrent protection, OCP-HBC

Under normal operating conditions, OCR is able to ensure the current remains below the

specified maximum values. In the event of certain error conditions, however, it might not

be fast enough to limit the current. OCP is implemented to protect against those error

conditions. The OCP level, Vocp(HBC) (typ.

−1 V and +1 V), is higher than the OCR level

Vocr(HBC).

When the OCP level is reached, the frequency immediately jumps to the maximum value

via the soft start reset, followed by a normal sweep down.

7.8.11 HBC capacitive mode regulation, CMR (pin HB)

The MOSFETs in the half-bridge drive the resonant circuit. Depending on the output load,

the output voltage, and the switching frequency this resonant circuit can have an inductive

impedance or a capacitive impedance. Inductive impedance is preferred because it

facilitates efficient zero-voltage switching.

Harmful switching in Capacitive mode is prevented by the adaptive non-overlap time

function (see Section 7.8.4.2). An extra action is performed which results in Capacitive

Mode Regulation (CMR). CMR causes the half-bridge circuit to return to Inductive mode

from Capacitive mode.

Fig 18. Overcurrent regulation during start-up

Iocr

−Iocr

ICur(HBC)

Iss(hf)(SSHBC)

Iss(If)(SSHBC)

−Iss(If)(SSHBC)

−Iss(hf)(SSHBC)

ISSHBC/EN

VSSHBC/EN

Vfmin(SSHBC)

Vss(hf-lf)(SSHBC)

Vfmax(SSHBC)

VOutput

Vreg

Fast soft-start sweep (charge and discharge)

Slow soft-start sweep (charge and discharge)

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