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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM8S датащи(PDF) 215 Page - STMicroelectronics |
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STM8S датащи(HTML) 215 Page - STMicroelectronics |
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215 / 467 page  DocID14587 Rev 14 215/467 RM0016 16-bit advanced control timer (TIM1) 261 17.7.30 Break register (TIM1_BKR) Address offset: 0x1D Reset value: 0x00 7 654 3210 MOE AOE BKP BKE OSSR OSSI LOCK rw rw rw rw rw rw rw rw Bit 7 MOE: Main output enable This bit is cleared asynchronously by hardware as soon as the break input is active. It is set by software or automatically depending on the AOE bit. It acts only on the channels which are configured in output. 0: OC and OCN outputs are disabled or forced to idle state 1: OC and OCN outputs are enabled if their respective enable bits are set (CCiE in TIM1_CCERi registers). See OC/OCN enable description for more details (Section 17.7.13 on page 205). Bit 6 AOE: Automatic output enable 0: MOE can be set only by software 1: MOE can be set by software or automatically at the next UEV (if the break input is not active) Note: This bit can no longer be modified while LOCK level 1 has been programmed (LOCK bits in the TIM1_BKR register). Bit 5 BKP: Break polarity 0: Break input BKIN is active low 1: Break input BKIN is active high Note: This bit can no longer be modified while LOCK level 1 has been programmed (LOCK bits in the TIM1_BKR register). Bit 4 BKE: Break enable 0: Break input (BKIN) disabled 1: Break input (BKIN) enabled Note: This bit can no longer be modified while LOCK level 1 has been programmed (LOCK bits in the TIM1_BKR register). |
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