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M95M04-DR датащи(PDF) 29 Page - STMicroelectronics

номер детали M95M04-DR
подробное описание детали  4-Mbit serial SPI bus EEPROM
PDF  46 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M95M04-DR датащи(HTML) 29 Page - STMicroelectronics

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DS12179 Rev 1
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M95M04-DR
Instructions
37
6.10
Lock ID
The Lock ID instruction permanently locks the Identification page in read-only mode. Before
this instruction can be accepted, a Write enable (WREN) instruction must have been
executed.
The Lock ID instruction is issued by driving Chip select (S) low, sending the instruction code,
the address and a data byte on Serial data input (D), and driving Chip select (S) high. In the
address sent, A10 must be equal to 1, all other address bits are Don't Care. The data byte
sent must be equal to the binary value xxxx xx1x, where x = Don't Care.
Chip select (S) must be driven high after the rising edge of Serial clock (C) that latches in
the eighth bit of the data byte, and before the next rising edge of Serial clock (C). Otherwise,
the Lock ID instruction is not executed.
Driving Chip select (S) high at a byte boundary of the input data triggers the self-timed write
cycle whose duration is tW (as specified in AC characteristics in Section 9: DC and AC
parameters). The instruction sequence is shown in Figure 18.
The instruction is discarded, and is not executed, under the following conditions:
If a Write cycle is already in progress
If Block protect bits (BP1,BP0) = (1,1)
If a rising edge on Chip select (S) happens outside of a byte boundary
If the identification is already locked.
Figure 18. Lock ID sequence



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