CS42428 datasheet(32/67 Pages) CIRRUS

номер детали	CS42428

подробное описание детали	114 dB, 192kHz 8-Ch CODEC WITH PLL

PDF	67 Pages

Scroll/Zoom	100%

производитель	CIRRUS [Cirrus Logic]

домашняя страница	http://www.cirrus.com

Logo

32 / 67 page

CS42428

5 REGISTER DESCRIPTION

All registers are read/write except for I.D. and Revision Register, OMCK/PLL_CLK Ratio Register, Clock

Status and Interrupt Status Register which are read only. See the following bit definition tables for bit as-

signment information. The default state of each bit after a power-up sequence or reset is listed in each bit

description.

5.1

Memory Address Pointer (MAP)

Not a register

5.1.1

INCREMENT(INCR)

Default = 1

Function:

Memory address pointer auto increment control

0 - MAP is not incremented automatically.

1 - Internal MAP is automatically incremented after each read or write.

5.1.2

MEMORY ADDRESS POINTER (MAPX)

Default = 0000001

Function:

Memory address pointer (MAP). Sets the register address that will be read or written by the control

port.

5.2

Chip I.D. and Revision Register (address 01h) (Read Only)

5.2.1

CHIP I.D. (CHIP_IDX)

Default = 1110

Function:

I.D. code for the CS42428. Permanently set to 1110.

5.2.2

CHIP REVISION (REV_IDX)

Default = 0001

Function:

CS42428 revision level. Revision C is coded as 0011.

76543

210

INCR

MAP6

MAP5

MAP4

MAP3

MAP2

MAP1

MAP0

76543

210

Chip_ID3

Chip_ID2

Chip_ID1

CHIP_ID0

Rev_ID3

Rev_ID2

Rev_ID1

Rev_ID0

CS42428 датащи(PDF) 32 Page - Cirrus Logic

CS42428 датащи(HTML) 32 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67

датащи скачать

ссылки URL