Low Voltage CMOS Logic – 74LVC2G66

Dual SPST Bilateral Analog Switch in bare die form

Rev 1.0

29/06/19

 

Description

Features:

 

 

 

 

 

 

 

The 74LVC2G66 Dual Single-Pole Single-Throw Analog

Switch is produced using an optimised low voltage

CMOS process. Each switch consists of two

input/output pins and an active HIGH enable input pin

(OE). A LOW signal on the enable pin (OE) turns the

analog switch off. Schmitt trigger action on the enable

inputs provides circuit tolerance for slow input rise and

fall times. Both analog and digital signals are supported

is suited for multiplexing in analog-to-digital or digital-to-

analog conversion and also finds use in signal gating,

chopping or modulation/de-modulation applications.

Switch current capability: 32mA

Enable inputs accept up to 5.5V

Rail-to-Rail Input / Output

High noise immunity

Tiny Die size.

Die Dimensions in µm (mils)

 

 

 

Ordering Information

The following part suffixes apply:

No suffix - MIL-STD-883 /2010B Visual Inspection

720 (28)

 

 

 

 

 

 

 

 

 

 

 

“H” - MIL-STD-883 /2010B Visual Inspection

+ MIL-PRF-38534 Class H LAT

“K” - MIL-STD-883 /2010A Visual Inspection (Space)

+ MIL-PRF-38534 Class K LAT

LAT = Lot Acceptance Test.

For further information on LAT process flows see below.

www.siliconsupplies.com\quality\bare-die-lot-qualification

Supply Formats:

Mechanical Specification

Default – Die in Waffle Pack (400 per tray capacity)

Die Size (Unsawn)

720 x 540

28 x 21

µm

mils

Minimum Bond Pad Size

70 x 70

Sawn Wafer on Tape – On request

µm

2.76 x 2.76

mils

Die Thickness

280 (±20)

Unsawn Wafer – On request

Die Thickness <> 280µm(11 Mils) – On request

Assembled into Ceramic Package – On request

µm

11.02 (±0.79)

mils

Top Metal Composition

Al-Si-Cu 3 µm

Back Metal Composition

N/A – Bare Si

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