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74LVC2G66 датащи(PDF) 3 Page - Silicon Supplies

номер детали 74LVC2G66
подробное описание детали  Low Voltage CMOS Logic
PDF  9 Pages
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производитель  SS [Silicon Supplies]
домашняя страница  https://siliconsupplies.com/
Logo SS - Silicon Supplies

74LVC2G66 датащи(HTML) 3 Page - Silicon Supplies

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Absolute Maximum Ratings2
PARAMETER
SYMBOL
VALUE
UNIT
Supply Voltage (Referenced to GND)
VCC
-0.5 to +6.5
V
Input Voltage (Referenced to GND)
VIN
-0.5 to +6.5
V
Input Clamp Current
IIK
-50
mA
Switch I/O Voltage (Referenced to GND)
VSW
-0.5 to VCC +0.5
V
On-State Switch Current
ISW
±50
mA
Switch Clamping Current
ISK
±50
mA
VCC or GND Current
ICC
±100
mA
Power Dissipation in Still Air
3
PD
250
mW
Storage Temperature Range
TSTG
-65 to 150
°C
 
Low Voltage CMOS Logic – 74LVC2G66
Rev 1.0
29/06/19
2.  Operation above the absolute maximum rating may cause device failure. Operation at the absolute maximum ratings, for extended periods, may
reduce device reliability. 3. Measured in plastic TSSOP package, results in die form are dependent on die attach and assembly method.
Recommended Operating Conditions4 (Voltages referenced to GND)
PARAMETER
SYMBOL
MIN
MAX
UNITS
Supply Voltage
VCC
1.65
5.5
V
Switch I/O Voltage
VSW
0
5.5
V
VCC = 1.65V to 1.95V
0.65xVCC
-
VCC = 2.3V to 2.7V
0.7xVCC
-
VCC = 3V to 3.6V
0.7xVCC
-
High-Level
Input Voltage,
Enable Input
VCC = 4.5V to 5.5V
VIH
0.7xVCC
-
V
VCC = 1.65V to 1.95V
-
0.35xVCC
VCC = 2.3V to 2.7V
-
0.3xVCC
VCC = 3V to 3.6V
-
0.3xVCC
Low-Level
Input Voltage,
Enable Input
VCC = 4.5V to 5.5V
VIL
-
0.3xVCC
V
Enable Input Voltage
VIN
0
5.5
V
Operating Temperature Range
TJ
-40
+85
°C
VCC = 1.65V to 1.95V
0
20
VCC = 2.3V to 2.7V
0
20
VCC = 3V to 3.6V
0
10
Input Transition
Rise & Fall Rate
VCC = 4.5V to 5.5V
Δt / ΔV
0
10
ns/V
 
4.  This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken
to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be
constrained to the range GND ≤ (VIN or VOUT) ≤ VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
Unused outputs must be left open.



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