Nexperia

74LVC30A

8-input NAND gate

3. Ordering information

Table 1. Ordering information

Package

Type number

Temperature range Name

Description

Version

74LVC30AD

-40 °C to +125 °C

SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

74LVC30APW

-40 °C to +125 °C

TSSOP14

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

74LVC30ABQ

-40 °C to +125 °C

DHVQFN14 plastic dual in-line compatible thermal enhanced

very thin quad flat package; no leads; 14 terminals;

body 2.5 x 3 x 0.85 mm

SOT762-1

4. Functional diagram

mna488

A

Y

1

8

B

2

C

3

D

4

E

5

F

6

G

11

H

12

Fig. 1. Logic symbol

8

&

mna489

1

2

3

4

5

6

11

12

Fig. 2. IEC logic symbol

B

A

C

D

F

E

G

H

mna490

Y

Fig. 3. Logic diagram

74LVC30A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 15 March 2019

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