Nexperia

74LVC30A

8-input NAND gate

References

Outline

version

European

projection

Issue date

IEC

JEDEC

JEITA

SOT762-1

MO-241

sot762-1_po

15-04-10

15-05-05

Unit

mm

max

nom

min

1

0.05

3.1 1.65 2.6

0.5

2

0.4

Dimensions (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;

14 terminals; body 2.5 x 3 x 0.85 mm

SOT762-1

b

0.30

c

1.00

e

k

k

L

v

0.1

w

y

0.02

0.2

3.0 1.50 2.5

0.1

0.25

0.05 0.05

0.3

0.85

0.2

0.00

2.9 1.35 2.4

0.18

0.5

1.15

0

4 mm

2

scale

terminal 1

index area

A

c

L

k

b

2

6

13

9

8

7

1

14

D

E

terminal 1

index area

e

e

C

y

C

A

C

B

v

C

w

detail X

A

B

X

Fig. 10. Package outline SOT762-1 (DHVQFN14)

74LVC30A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 15 March 2019

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