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74LVC30AD датащи(PDF) 1 Page - Nexperia B.V. All rights reserved |
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74LVC30AD датащи(HTML) 1 Page - Nexperia B.V. All rights reserved |
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1 / 13 page ![]() 74LVC30A 8-input NAND gate Rev. 2 — 15 March 2019 Product data sheet 1. General description The 74LVC30A is an 8-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices in a mixed 3.3 V and 5 V environment. Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 1.2 V to 3.6 V • Inputs accept voltages up to 5.5 V • CMOS low power consumption • Direct interface with TTL levels • Complies with JEDEC standard: • JESD8-7A (1.65 V to 1.95 V) • JESD8-5A (2.3 V to 2.7 V) • JESD8-C/JESD36 (2.7 V to 3.6 V) • ESD protection: • HBM JEDEC JS-001-2012 exceeds 2000 V • MM JESD22-A115-C exceeds 200 V • CDM JESD22-C101F exceeds 1000 V • Specified from -40 °C to +85 °C and -40 °C to +125 °C |
Аналогичный номер детали - 74LVC30AD |
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Аналогичное описание - 74LVC30AD |
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