LT8551 datasheet(13/32 Pages) AD

13 / 32 page

LT8551

Rev 0

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OPERATION

Introduction

The LT8551 is a multiphase expander for synchronous

boost controllers. Each LT8551, which has 8 gate drivers,

can expand up to four phases. Multiple LT8551 devices

can also be used together in a system, and up to 18 dif-

ferent phases can be supported. In addition, the part sup-

ports more than one phase per phase angle.

The ADI proprietary control architecture allows the LT8551

to cycle-by-cycle duplicate the operation of a boost con-

troller (named as Primary Controller). The LT8551 mea-

sures the primary controller’s inductor current as well as

primary controller’s gate driver operation timing, and at

the same time, accurately monitors and adjusts the cur-

rent of each expanded channel to achieve excellent DC and

transient current sharing. The current sharing accuracy

is ±6%, ±6% and ±10% over temperature when ILIM set

at REG, Float and GND, respectively.

In normal operation, the primary boost regulator’s switch

current is compared with the expanded channel’s switch

current by the EA (EA1/2/3/4 in the Block Diagram).

When the primary channel’s current increases, the VC

(VC1/2/3/4 in the Block Diagram) voltage also increases,

which in turn controls the expanded channel’s switches to

increase the current until the expanded channel’s current

matches the primary channel’s current.

System with Multiple LT8551 devices

One LT8551 can expand up to four channels. This config-

uration can provide enough power for most high current

applications. However, for even higher power applications,

the LT8551 can be configured for multi-chip operation.

When two or more LT8551 devices are used together in

a system, one LT8551 is the master and other LT8551

devices are slaves. Connecting a resistor from the RT/MS

pin to ground sets the chip as the master and connecting

the RT/MS pin to REG sets the chip as a slave. When only

one LT8551 is used in a system, this LT8551 needs to be

set as a master.

Stage Shedding Mode

The MODE pin is dedicated for the Stage Shedding fea-

ture. The MODE pin is an output pin for a master LT8551,

and it is an input pin for a slave LT8551.

For a master LT8551, when the MODE pin is floating, the

LT8551 operates in Stage Shedding mode at light loads.

In this case, when the (ISP–ISN) peak voltage is lower

than a certain value for some period of time, the part

turns off channels 1 and 3 to increase overall efficiency.

After channel 1 and 3 are off, if the (ISP–ISN) peak volt-

age is still lower than a certain value for some period of

time, the part also turns off channel 4 and only leaves

channel 2 running. For bidirectional applications, stage

shedding should be disabled when the current is regulated

in the reverse direction. Driving the MODE pin below 0.5V

disables the Stage Shedding feature.

In a multiple LT8551 devices system, all chips’ MODE

pins need to be connected together and leave them float-

ing if the Stage Shedding feature is desired. The mas-

ter LT8551 senses the (ISP–ISN) voltage to decide the

proper operation. The slave LT8551 devices follows the

master LT8551’s Stage Shedding operation with some

delay. Driving all chips’ MODE pins below 0.5V disables

the Stage Shedding feature.

Clock Scheme

This section discusses the LT8551’s clock scheme for a

multiple LT8551 system. This clock scheme can easily

apply to a single LT8551 system by ignoring the slave

LT8551 devices.

A master LT8551 generates two clock signals: CLK1 and

CLK2. In a multiple LT8551 system, as shown in Figure 1,

all LT8551 devices’ CLK2 pins need to be connected

together. The CLK1 signal is at the fundamental switching

frequency (Refer to Internal Oscillator and SYNC Pin and

Clock Synchronization sections for more information),

and it is used to synchronize the primary boost controller

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