поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

HM8563 датащи(PDF) 19 Page - Shenzhen Huazhimei Semiconductor Co., Ltd

номер детали HM8563
подробное описание детали  OA equipments such as Fax machines
PDF  22 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  HMSEMI [Shenzhen Huazhimei Semiconductor Co., Ltd]
домашняя страница  http://www.hmsemi.com/
Logo HMSEMI - Shenzhen Huazhimei Semiconductor Co., Ltd

HM8563 датащи(HTML) 19 Page - Shenzhen Huazhimei Semiconductor Co., Ltd

Back Button HM8563 Datasheet HTML 14Page - Shenzhen Huazhimei Semiconductor Co., Ltd HM8563 Datasheet HTML 15Page - Shenzhen Huazhimei Semiconductor Co., Ltd HM8563 Datasheet HTML 16Page - Shenzhen Huazhimei Semiconductor Co., Ltd HM8563 Datasheet HTML 17Page - Shenzhen Huazhimei Semiconductor Co., Ltd HM8563 Datasheet HTML 18Page - Shenzhen Huazhimei Semiconductor Co., Ltd HM8563 Datasheet HTML 19Page - Shenzhen Huazhimei Semiconductor Co., Ltd HM8563 Datasheet HTML 20Page - Shenzhen Huazhimei Semiconductor Co., Ltd HM8563 Datasheet HTML 21Page - Shenzhen Huazhimei Semiconductor Co., Ltd HM8563 Datasheet HTML 22Page - Shenzhen Huazhimei Semiconductor Co., Ltd  
Zoom Inzoom in Zoom Outzoom out
 19 / 22 page
background image
• 18 •
RS
serial resistance
−−
40
k
Ω
CL
parallel load capacitance
−
10
−
pF
CT
trimmer capacitance
Version B
2
−
10
pF
Version C
8
−
12
CLKOUT output
δCLKOUT
CLKOUT duty factor
[1]
−
50
−%
I2 C-bus timing characteristics[2]
fSCL
SCL clock frequency
[3]
−−
400
kHz
tHD;STA
START condition hold time
0.6
−−
μs
tSU:STA
set-up time for a repeated
START condition
0.6
−−
μs
tLOW
SCL LOW time
1.3
−−
μs
tHIGH
SCL HIGH time
0.6
−−
μs
tr
SCL and SDA rise time
−−
0.3
μs
tf
SCL and SDA fall time
−−
0.3
μs
Cb
capacitive bus line load
−−
400
pF
tSU;DAT
data set-up time
100
−−
ns
tHD;DAT
data hold time
0
−−
ns
tSU:STO
set-up time for STOP condition
4.0
−−
μs
tSW
tolerable spike width on bus
−−
50
ns
[1] Unspecified for fCLKOUT = 32.768 kHz.
[2] All timing values are valid within the operating supply voltage range at Tamb and referenced to VIL and
VIH with an input voltage swing of VSS to VDD.
[3] I
2C -bus access time between two STARTs or between a START and a STOP condition to this device
must be less than one second.
Fig 18 I2C -bus timing waveforms.
HM8563



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com