• 6 •

2.7.1 Control/Status 1 register

Table 6 Control/Status 1 register bits description

00H

Symbol

Description

b7

TEST1

TEST1 = 0; normal mode.

TEST1 = 1; EXT_CLK test mode; see Section 8.7.

b5

STOP

STOP = 0; RTC source clock runs.

STOP = 1; all RTC divider chain flip-flops are asynchronously set to logic 0; the

RTC clock is stopped (CLKOUT at 32.768 kHz is still available).

b3

TESTC

TESTC = 0; power-on reset override facility is disabled (set to logic 0 for normal

operation).

TESTC = 1; power-on reset override is enabled.

b6, b4,

b2..0

-

By default set to logic 0.

2.7.2 Control/Status 2 register

Table 7 Description of Control/Status 2 register bits description

01H

Symbol

Description

b7..5

0

By default set to logic 0

b4

TI/TP

TI/TP = 0: INT is active when TF is active (subject to the status of TIE).

TI/TP = 1: INT pulses active according to Table 8 (subject to the status of TIE). Note

that if AF and AIE are active then INT will be permanently active.

b3

AF

When an alarm occurs, AF is set to logic 1. Similarly, at the end of a timer

countdown, TF is set to logic 1. These bits maintain their value until overwritten by

software. If both timer and alarm interrupts are required in the application, the source

of the interrupt can be determined by reading these bits. To prevent one flag being

overwritten while clearing another, a logic AND is performed during a write access.

See Table 9 for the value descriptions of bits AF and TF.

b2

TF

b1

AIE

Bits AIE and TIE activate or deactivate the generation of an interrupt when AF or TF

is asserted, respectively. The interrupt is the logical OR of these two conditions

when both AIE and TIE are set.

AIE = 0: alarm interrupt disabled; AIE = 1: alarm interrupt enabled.

TIE = 0: timer interrupt disabled; TIE = 1: timer interrupt enabled.

b0

TIE

Table 8

———

INT operation (bit TI/TP = 1)

Source clock (Hz)

———

INT period(s)

n=1

n>1

4096

1/8192

1/4096

64

1/128

1/64

1

1/64

1/64

1/60

1/64

1/64

Note:

[1] TF and

———

INT become active simultaneously.

[2] n = loaded countdown timer value. Timer stopped when n = 0.

HM8563