PD69108/F

Copyright © 2013

Microsemi

Rev. 1.6

Analog Mixed Signal Group

1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308

8

TM

®

PIN

P I N NA M E

PIN TY PE

D ESC R I PTIO N

7

AGND

Power

Analog ground

8

N/C

Not Connected

9

PORT_SENSE2

Analog Input

Sense resistor port input

(Connected to 0.36

Ω, 1% resistor to QGND with ~12 mΩ trace for

measurements accuracy).

10

VPORT_NEG2

Analog I/O

Negative port output

11

PORT_SENSE3

Analog Input

Sense resistor port input

(Connected to 0.36

Ω, 1% resistor to QGND with ~12 mΩ trace for

measurements accuracy).

12

VPORT_NEG3

Analog I/O

Negative port output

13

N/C

Analog I/O

Test pin for production use only

Keep open, not connected

14

N/C

Analog I/O

15

VMAIN

Power

Supplies voltage for the internal analog circuitry. A low ESR 1 uF (or

higher) bypass capacitor, connected to AGND should be placed as

close as possible to this pin through low resistance traces.

16

VAUX5

Power

Regulated 5 VDC output voltage source; it needs to be connected to

a filtering capacitor of 4.7 uF or higher.

If an external NPN is used to regulate the voltage, connect this pin to

the "Emitter" (the "collector" should be connected to Vmain)

17

DRV_VAUX5

Power

Driven outputs for 5 VDC external regulation; if internal regulation is

used, connect to pin 16.

If an external NPN is used to regulate the voltage, connect this pin to

the "Base".

18

AGND

Power

Analog ground

19

VAUX3P3_INT

Power

Connected to VAX3P3 (pin 20) if internal 3.3 VDC regulator is used.

Connect to VAUX5 (pin 16) if external 3.3 VDC regulator is used

20

VAUX3P3

Power

Regulated 3.3v output voltage source. A 4.7

μF or higher filtering

capacitor should be connected between this pin and AGND.

When an external 3.3 VDC regulator is used, connect it to this pin to

supply the chip.

21

QGND

Power

Quiet analog ground.

22

IREF

Analog Input

Reference resistor pin. Connect a 30.1

kΩ 1% resistor to QGND.

23

TRIM

Analog Input

Trimming Input for IC production.

Should be connected to VAUX3P3.

24

REG_EN_N

REG_EN_N

Enable/Disable the internal 3.3 VDC regulator in case an external

3.3 VDC is used to supply the chip.

• GND: Internal regulator enabled

• 3.3 VDC: Internal regulator disabled

25

VPORT_NEG4

Analog I/O

Negative port output.

26

PORT_SENSE4

Analog Input

Sense resistor port input

(Connected to 0.36

Ω, 1% resistor to QGND with ~12 mΩ trace for

measurements accuracy).

27

VPORT_NEG5

Analog I/O

Negative port output.

28

PORT_SENSE5

Analog Input

Sense resistor port input.

(Connected to 0.36

Ω, 1% resistor to QGND with ~12 mΩ trace for

measurements accuracy).

29

N/C

Not Connected

30

AGND

Power

Analog ground.

31

VPORT_NEG6

Analog I/O

Negative port output.