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GD25S512MDBJS датащи(PDF) 60 Page - GigaDevice Semiconductor (Beijing) Inc.

номер детали GD25S512MDBJS
подробное описание детали  3.3V Uniform Sector Dual and Quad Serial Flash
PDF  87 Pages
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производитель  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
домашняя страница  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25S512MDBJS датащи(HTML) 60 Page - GigaDevice Semiconductor (Beijing) Inc.

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3.3V Uniform Sector
Dual and Quad Serial Flash
GD25S512MD
60
Figure 67 Read Security Registers command Sequence Diagram (ADS=1)
7.38.
Enable Reset (66H) and Reset (99H)
If the Reset command is accepted, any on-going internal operation will be terminated and the device will return to its
default power-on state and lose all the current volatile settings, such as Volatile Status Register bits, Write Enable Latch
status (WEL), Program/Erase Suspend status, Read Mode bit setting (M7-M0) and Wrap Bit Setting (W6-W4).
The “Enable Reset (66H)” and the “Reset (99H)” commands can be issued in SPI mode. The “Reset (99H)” command
sequence as follow: CS# goes low  Sending Enable Reset command  CS# goes high  CS# goes low  Sending
Reset command  CS# goes high. Once the Reset command is accepted by the device, the device will take approximately
tRST / tRST_E to reset. During this period, no command will be accepted. Data corruption may happen if there is an on-going
or suspended internal Erase or Program operation when Reset command sequence is accepted by the device. It is
recommended to check the BUSY bit and the SUS bit in Status Register before issuing the Reset command sequence.
Figure 68 Enable Reset and Reset command Sequence Diagram
7.39.
Read Serial Flash Discoverable Parameter (5AH)
The Serial Flash Discoverable Parameter (SFDP) standard provides a consistent method of describing the functional
and feature capabilities of serial flash devices in a standard set of internal parameter tables. These parameter tables can
be interrogated by host system software to enable adjustments needed to accommodate divergent features from multiple
vendors. The concept is similar to the one found in the Introduction of JEDEC Standard, JESD68 on CFI. SFDP is a standard
of JEDEC Standard No.216B.
Command
0
1
2
3
4
5
6
7
66H
CS#
SCLK
SI
SO
High-Z
Command
0
1
2
3
4
5
6
7
99H
Command
0
1
2
3
4
5
6
7
48H
CS#
SCLK
SI
SO
High-Z
8
9 10
36 37 38 39
3
2
1
0
31 30 29
32-bit address
MSB
6
5
4
3
2
1
0
Data Out1
50 51 52 53
49
54 55
48
7
6
5
4
3
2
1
0
7
6
5
7
Data Out2
CS#
SCLK
SI
SO
MSB
Dummy Byte
42 43 44 45
41
46 47
40



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