PCD6003 datasheet(30/96 Pages) PHILIPS

30 / 96 page

2001 Apr 17

Philips Semiconductors

Product speciﬁcation

Digital telephone answering machine chip

PCD6003

10.5

Interface to DSP

The DSP to Microcontroller Interface (DMI) can be used for

the following purposes:

• Transferring compressed speech data from

microcontroller to DSP

• Transferring compressed speech data from DSP to

microcontroller

• Transferring DSP parameters (DSP mode, tone

frequency etc.) from microcontroller (API) to the DSP

• Transferring DSP events (Caller ID, Ring Detect, VOX,

Call Progress etc.) to the microcontroller.

The microcontroller and the DSP can communicate by

means of 6 SFRs (MTD0, MTD1 and MTD2 and DTM0,

DTM1 and DTM2) and 4 DSP I/O registers (DTMC,

DTMD, MTDC and MTDD), see Fig.11. The DTMC and

MTDC registers are used for communication and control

and the DTMD and MTDD registers for transferring data.

The Micro Transmit (MT), DR (DSP receive) and DT (DSP

Transmit), Micro Receive (MR) ensure that either the old

data is read or new data is read although the DSP and

microcontroller operate on different clocks. This can be

achieved by means of simple handshake circuitry in either

direction. The DR state machine ensures that the DSP will

never read new MTDC control data and old MTDD speech

data. In order to guarantee proper transitions of the

DR state machine the DSP always has to read the DTMC

first and afterwards the DTMD IO register.

The TICB generates the DSP_event interrupt when it

receives a dsp_uc_req signal. The dsp_uc_req cannot be

generated by the microcontroller because the dsp_event

interrupt must be able to wake-up the microcontroller from

Power-down.

MTD0/1/2 are written by the microcontroller. After each

write to MTD0 the contents of MTD0/1/2 are transferred to

the 16-bit register MTDD and the 8-bit register MTDC (the

MSB is set to 00H), which can be read by the DSP via the

DSP I/O bus. In this way the DSP always receives a valid

control byte and a valid 16-bit data word. If MTD0 is written

while the DSP is turned off the MTD0 value will be

transferred to the MTDC IO-register as soon as the DSP is

turned on.

The MTDC and MTDD registers are continuously and

immediately read by the DSP after every FS1 interrupt.

The microcontroller can write a new word to MTD0/1/2 but

has to wait for at least 125

µs to be sure that the DSP has

read the previous value.

DTM0/1/2 are read by the microcontroller as SFRs. The

contents of the DTMD and DTMC registers are transferred

to the DTM0/1/2 SFRs when the DSP writes the DTMC

is generated to the microcontroller, which triggers the

microcontroller to read the DTM0/1/2 SFRs. In this way

DSP events and speech data can be transferred easily to

the microcontroller. The DSP will transfer a maximum of

3 bytes, one command byte and two data bytes, for

example; every 125

µs to the microcontroller. Thus one

write to DTMC takes place every 125

µs.

Similarly, the microcontroller can transfer a maximum of

3 bytes every 125

µs to the DSP. Thus one write to MTD0

takes place every 125

µs. The default rate for the

FS_event interrupt will be FS1/8 resulting in a data transfer

rate of 10 words every 10 ms which equals 16 kbits/s.

In case a higher rate is needed the FS_event interrupt rate

can be switched to FS1/4.

10.6

Interface to Real-Time Clock (RTC)

When the RTC_event interrupt is enabled in IEN1 and the

‘global enable’ bit in IEN0 is set and the PCD6003 is not in

Emergency mode (CKCON.7 = 1), the microcontroller will

get an RTC_event interrupt every 1 minute. The RTC

interrupt service routine must clear the RTC flag. The

RTC_event interrupt will also wake-up the microcontroller

when it is in the Power-down or in the Idle state. Under

power saving conditions this will allow the user to switch off

the microcontroller and still maintain an accurate real time

clock.

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