PCD6003 datasheet(25/96 Pages) PHILIPS

25 / 96 page

2001 Apr 17

Philips Semiconductors

Product speciﬁcation

Digital telephone answering machine chip

PCD6003

Notes

1. All SFR bits with reset state ‘X’ are either ‘spare’ (i.e. have a memory bit in this position with reset state ‘0’) or ‘-’ (i.e.

do not have a physical memory bit in this position). All ‘spare’ bits can be addressed and used as additional general

purpose bits. All bits marked ‘-’ cannot be addressed by the user. To see which bits are ‘spare’ or ‘-’ refer to the

respective SFR layouts.

2. Reserved registers, used for testing purposes. Writing of undocumented or reserved bits might lead to unexpected

behaviour of the device (see Section 10.8).

PMTR2

Power Management Test Register 2; see note 2

0000 0000

PSW

Program Status Word

0000 0000

RTCON

Real-Time Clock control

0000 0000

S1CON

I2C-bus Serial Control Register

0000 0000

S1ADR

I2C-bus own slave address register

0000 0000

S1DAT

I2C-bus Data Shift Register

0000 0000

S1STA

I2C-bus Status Register (read only)

1111 1000

SYMOD

analog system mode control

0000 0000

SPCON

system power and clock conﬁguration

0XX0 0000

Stack Pointer

0000 0111

TCON

Timer/counter Control Register

0000 0000

TMOD

Timer/counter Mode Control Register

0000 0000

TL0

Timer Low Register 0

0000 0000

TL1

Timer Low Register 1

0000 0000

TH0

Timer High Register 0

0000 0000

TH1

Timer High Register 1

0000 0000

VREFR

Voltage Reference Register

1010 0000

WDT

Watchdog Timer

0000 0000

WDTKEY

Watchdog Key Register

0000 0000

XWUD

external wake-up disable

0000 0000

NAME

ADDRESS (HEX)

DESCRIPTION

RESET STATE(1)

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