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MAX705ESA датащи(PDF) 7 Page - ARTSCHIP ELECTRONICS CO.,LMITED.

номер детали MAX705ESA
подробное описание детали  Low-Cost, pervisory Circuit
PDF  10 Pages
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производитель  ARTSCHIP [ARTSCHIP ELECTRONICS CO.,LMITED.]
домашняя страница  http://www.artschip.com/
Logo ARTSCHIP - ARTSCHIP ELECTRONICS CO.,LMITED.

MAX705ESA датащи(HTML) 7 Page - ARTSCHIP ELECTRONICS CO.,LMITED.

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MAX705-MAX813L
Low-Cost, µP Supervisory Circuit
www.artschip.com
7
Power-Fail Comparator
The power-fail comparator can be used for various purposes because its output and noninverting input are not internally
connected. The inverting input is internally connected to a 1.25V reference.
Figure 3. MAX705/MAX706/MAX813L Watchdog Timing.
Figure 4. MAX705/MAX706 RESET, MR, and WDO Timing
with WDI Three-Stated. The MAX707/MAX708/MAX813L
RESET output is the inverse of RESET shown.
To build an early-warning circuit for power failure, connect the PFI pin to a voltage divider (see Typical Operating Circuit). Choose
the voltage divider ratio so that the voltage at PFI falls below 1.25V just before the +5V regulator drops out. Use PFO to interrupt
the µP so it can prepare for an orderly power-down.
Applications Information
Ensuring a Valid RESET
Output Down to Vcc=0V When Vcc falls below 1V, the
MAX705-MAX708 RESET output no longer sinks current – it
becomes an open circuit. High-impedance CMOS logic inputs
can drift to undetermined voltages if left undriven. If a
pull-down resistor is added to the RESET pin as shown in
Figure 5, any stray charge or leakage currents will be drained
to ground, holding RESET low. Resistor value (R1) is not
critical. It should be about 100KΩ, large enough not to load
RESET and small enough to pull RESET to ground.
Monitoring Voltages Other Than the
Unregulated DC Input
Monitor voltages other than the unregulated DC by connecting
a voltage divider to PFI and adjusting the ratio appropriately. If
required, add hysteresis by connecting a resistor (with a value
approximately 10 times the sun of the two resistors in the
potential divider network) between PFI and PFO. A capacitor
between PFI and GND will reduce the power-fail circuit’s
sensitivity to high-frequency noise on the line being monitored.
RESET can be asserted on other voltages in addition to the
+5V Vcc line. Connect PFO to MR to initiate a RESET pulse
when PFI drops below 1.25V. Figure 6 shows the
MAX705-MAX708S configured to assert RESET when the
+5V supply falls below the reset threshold, or when the +12V
supply falls below approximately 11V.
Monitoring a Negative Voltage
The power-fail comparator can also monitor a negative supply
rail (Figure 7). When the negative rail is good (a negative
voltage of large magnitude), PFO is low, and when the
negative rail is degraded (a negative voltage of lesser
magnitude), PFO is high. By adding the resistors and
transistor as shown, a high PFO triggers reset. As long as
PFO remains high, the MAX705-MAX708/MAX813L will keep
reset asserted (RESET=low, RESET =high). Note that this
circuit’s accuracy depends on the PFI threshold tolerance, the
Vcc line, and the resistors.



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