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DAC101S101 датащи(PDF) 5 Page - National Semiconductor (TI)

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номер детали DAC101S101
подробное описание детали  10-Bit Micro Power Digital-to-Analog Converter with Rail-to-Rail Output
PDF  19 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
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A.C. and Timing Characteristics
Values shown in this table are design targets and are subject to change before product release. The following specifica-
tions apply for V
A = +2.7V to +5.5V, RL =2k
Ω to GND, C
L = 200 pF to GND, fSCLK = 30 MHz, input code range 12 to 1011.
Boldface limits apply for T
MIN
≤ T
A
≤ T
MAX: all other limits TA = 25˚C, unless otherwise specified.
Symbol
Parameter
Conductions
Typical
Limits
Units
(Limits)
f
SCLK
SCLK Frequency
30
MHz (max)
t
s
Output Voltage Settling Time
(Note 10)
100h to 300h code
change, R
L =2k
Ω
C
L
≤ 200 pF
5
7.5
µs (max)
SR
Output Slew Rate
1
V/µs
Glitch Impulse
Code change from 200h to 1FFh
12
nV-sec
Digital Feedthrough
0.5
nV-sec
t
WU
Wake-Up Time
V
A = 5V
1.6
µs
V
A = 3V
1.9
µs
1/f
SCLK
SCLK Cycle Time
33
ns (min)
t
H
SCLK High time
5
13
ns (min)
t
L
SCLK Low Time
5
13
ns (min)
t
SUCL
Set-up Time SYNC to SCLK Rising
Edge
−15
0
ns (min)
t
SUD
Data Set-Up Time
2.5
5
ns (min)
t
DHD
Data Hold Time
2.5
4.5
ns (min)
t
CS
SCLK fall to rise of SYNC
V
A =5V
0
3
ns (min)
V
A =3V
−2
1
ns (min)
t
SYNC
SYNC High Time
2.7
≤ V
A
≤ 3.6
9
20
ns (min)
3.6
≤ V
A
≤ 5.5
5
10
ns (min)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified
Note 3: When the input voltage at any pin exceeds the power supplies (that is, less than GND, or greater than VA), the current at that pin should be limited to 10
mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two.
Note 4: The absolute maximum junction temperature (TJmax) for this device is 150˚C. The maximum allowable power dissipation is dictated by TJmax, the
junction-to-ambient thermal resistance (
θJA), and the ambient temperature (TA), and can be calculated using the formula PDMAX = (TJmax − TA)/ θJA. The values
for maximum power dissipation will be reached only when the device is operated in a severe fault condition (e.g., when input or output pins are driven beyond the
power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k
Ω resistor. Machine model is 220 pF discharged through ZERO Ohms.
Note 6: See the section entitled "Surface Mount" found in any post 1986 National Semiconductor Linear Data Book for methods of soldering surface mount devices.
Note 7: The analog inputs are protected as shown below. Input voltage magnitudes up to VA + 300 mV or to 300 mV below GND will not damage this device.
However, errors in the conversion result can occur if any input goes above VA or below GND by more than 100 mV. For example, if VA is 2.7VDC, ensure that −100mV
≤ input voltages ≤2.8VDC to ensure accurate conversions.
20154104
Note 8: To guarantee accuracy, it is required that VA be well bypassed.
Note 9: Typical figures are at TJ = 25˚C, and represent most likely parametric norms. Test limits are guaranteed to National’s AOQL (Average Outgoing Quality
Level).
Note 10: This parameter is guaranteed by design and/or characterization and is not tested in production.
www.national.com
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