RFM219SW

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5.11 User Registers

The user registers are all 8-bit width. There are two banks of the user registers: Configuration Bank and Control Bank.

5.11.1 Configuration Bank

The configuration bank has the address from 0x00 to 0x3D. This bank of registers provides an option to configure the feature of

the device. The way to do that is: use the RFPDK to generate the HEX file of the desired configurations, load the file into the

external MCU program, and the MCU program will write the content of HEX file into all these registers via the SPI at the

beginning of the application. This bank will only have to be written once in the application. The contents of these registers retain

their values until the power down of the device, and they will not be reset by the soft reset operation.

If the Sync Word recognition is done by the device in the application, the 4 configuration registers below, which store the value of

the 32-bit (maximum size) Sync Word, might have different values in different devices. Therefore, in that case, the value of the

Sync Word for each device does not come from the HEX file generated by the RFPDK, but the external MCU program. After

writing the content of the HEX file into the entire configuration bank, the MCU is able to overwrite these 4 registers with the

unique Sync Word at the beginning of the application.

Table 15. Sync Word Registers

Name

Addr

Default

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SYNC_A

0x16

0x00

Sync Word <7:0>

SYNC_B

0x17

0x00

Sync Word <15:8>

SYNC_C

0x18

0x00

Sync Word <23:16>

SYNC_D

0x19

0x00

Sync Word <31:24>

DC_CTL

0x1F

0x00

DC En

LFOSC Mode <1:0>

NA

NA

NA

NA

NA

SL_CTL

0x23

0x00

SLP En

NA

NA

NA

NA

NA

NA

NA

RX_CTL

0x25

0x00

RX En

NA

NA

NA

NA

NA

NA

NA

If EEPROM programming is used to configure the device, this configuration bank of user registers must NOT be written in the

MCU program, with the exception of the 4 Sync Word registers introduced above.

The “DC En”, “LFOSC Mode<1:0>”, “SLP En” and “RX En” bits provide the flexibility for the user to manually turn on/off the duty

cycle mode, as well as the sleep timer and the receive timer. The other NA bits of these registers must not be changed by the

external MCU.

A typical application is that, the device is configured to work in the passive mode by the RFPDK. After the power-up process the

device enters the sleep state, in which the external MCU can setup the control bank registers of the device. After that, the MCU

uses the above register bits to manually turn on the duty cycle mode. The device then automatically works in the duty-cycle mode

without the need of any external control. The MCU can disable the duty-cycle mode of the device any time when it is necessary.

The details of how to use these bits to turn on/off the duty-cycle mode is given in the application note “AN138 RFM219SW

5.11.2 Control Bank

Ten registers are available for the user to control the chip in the MCU program. Their functions are summarized as below.



Registers those have the address from 0x3F to 0x44 provide the interface to control the GPO and interrupts.



Register that has the address 0x45 allows the user to read out the instantiate RSSI value.



Register that has the address 0x46 allows the user to disable/enable a couple of specific functions.