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ZXLD1370EST16TC датащи(PDF) 33 Page - Diodes Incorporated |
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ZXLD1370EST16TC датащи(HTML) 33 Page - Diodes Incorporated |
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33 / 40 page ![]() ZXLD1370 Document number: DS32165 Rev. 6 - 2 33 of 40 www.diodes.com December 2016 © Diodes Incorporated ZXLD1370 Application Information (Cont.) PCB Layout Considerations PCB layout is a fundamental activity to get the most of the device in all configurations. In the following section it is possible to find some important insight to design with the ZXLD1370 both in Buck and Buck-Boost configurations. Figure 39 Circuit Layout Here are some considerations useful for the PCB layout: In order to avoid ringing due to stray inductances, the inductor L1, the anode of D1 and the drain of Q1 should be placed as close together as possible. The shaping capacitor C1 is fundamental for the stability of the control loop. To this end, it should be placed no more than 5mm from the SHP pin. Input voltage pins, VIN and VAUX, need to be decoupled. It is recommended to use two ceramic capacitors of 2.2uF, X7R, 100V (C3 and C4). In addition to these capacitors, it is suggested to add two ceramic capacitors of 1uF, X7R, 100V each (C2, C8), as well as a further decoupling capacitor of 100nF close to the VIN/VAUX pins (C9). VIN and VAUX pins can be short-circuited when the device is used in buck mode, or can be driven from a separate supply. SHP Pin VIN / VAUX Decoupling Inductor, Switch and Freewheeling Diode |
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