LTC2616CDD datasheet(3/20 Pages) LINER

3 / 20 page

LTC2606/LTC2616/LTC2626

26061626f

ELECTRICAL C

HARA TERISTICS The ● denotes specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. REF = 4.096V (VCC = 5V), REF = 2.048V (VCC = 2.7V), VOUT unloaded,

unless otherwise noted. (Note 11)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

PSR

Power Supply Rejection

VCC = ±10%

–81

ROUT

DC Output Impedance

VREF = VCC = 5V, Midscale; –15mA ≤ IOUT ≤ 15mA

●

0.05

0.15

Ω

VREF = VCC = 2.7V, Midscale; –7.5mA ≤ IOUT ≤ 7.5mA ●

0.06

0.15

Ω

ISC

Short-Circuit Output Current

VCC = 5.5V, VREF = 5.5V

Code: Zero Scale; Forcing Output to VCC

●

Code: Full Scale; Forcing Output to GND

●

VCC = 2.7V, VREF = 2.7V

Code: Zero Scale; Forcing Output to VCC

●

7.5

Code: Full Scale; Forcing Output to GND

●

7.5

Reference Input

Input Voltage Range

●

0VCC

Resistance

Normal Mode

●

124

160

kΩ

Capacitance

IREF

Reference Current, Power Down Mode

DAC Powered Down

●

0.001

µA

Power Supply

VCC

Positive Supply Voltage

For Specified Performance

●

2.7

5.5

ICC

Supply Current

VCC = 5V (Note 3)

●

0.340

0.5

VCC = 3V (Note 3)

●

0.27

0.4

DAC Powered Down (Note 3) VCC = 5V

●

0.35

µA

DAC Powered Down (Note 3) VCC = 3V

●

0.10

µA

Digital I/O (Note 11)

VIL

Low Level Input Voltage

●

–0.5

0.3VCC

(SDA and SCL)

VIH

High Level Input Voltage

(Note 8)

●

0.7VCC

(SDA and SCL)

VIL(LDAC)

Low Level Input Voltage (LDAC)

VCC = 4.5V to 5.5V

●

0.8

VCC = 2.7V to 5.5V

●

0.6

VIH(LDAC)

High Level Input Voltage (LDAC)

VCC = 2.7V to 5.5V

●

2.4

VCC = 2.7V to 3.6V

●

2.0

VIL(CAn)

Low Level Input Voltage on CA

See Test Circuit 1

●

0.15VCC

(

n = 0, 1, 2)

VIH(CAn)

High Level Input Voltage on CA

See Test Circuit 1

● 0.85VCC

(

n = 0, 1, 2)

RINH

Resistance from CA

n (n = 0, 1, 2)

See Test Circuit 2

●

kΩ

to VCC to Set CAn = VCC

RINL

Resistance from CA

n (n = 0, 1, 2)

See Test Circuit 2

●

kΩ

to GND to Set CA

n = GND

RINF

Resistance from CA

n (n = 0, 1, 2)

See Test Circuit 2

●

2MΩ

to VCC or GND to Set CAn = Float

VOL

Low Level Output Voltage

Sink Current = 3mA

●

0.4

tOF

Output Fall Time

VO = VIH(MIN) to VO = VIL(MAX),

● 20 + 0.1CB

250

CB = 10pF to 400pF (Note 9)

tSP

Pulse Width of Spikes Suppressed

●

050

by Input Filter

IIN

Input Leakage

0.1VCC ≤ VIN ≤ 0.9VCC

●

µA

CIN

I/O Pin Capacitance

●

Capacitive Load for Each Bus Line

●

400

CCAX

External Capacitive Load on Address

●

Pins CA

n (n = 0, 1, 2)

LTC2616CDD датащи(PDF) 3 Page - Linear Technology

LTC2616CDD датащи(HTML) 3 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

датащи скачать

ссылки URL