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AD5231

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Table III. Instruction/Operation Truth Table

1, 2, 3

Instruction Byte 0

Data Byte 1

Data Byte 0

Instruction

B23 ••••••••••••••••••••••• B16

B15 ••••• B8

B7 ••• B0

Number

C3 C2 C1 C0 A3 A2 A1 A0

X ••• D9 D8

D7 ••• D0

Operation

X X X X

X ••• X X

X ••• X

NOP: Do nothing. See Table XI

X ••• X X

X ••• X

Write content of EEMEM to RDAC Register.

This command leaves device in the Read Pro-

gram power state. To return part to the idle

state, perform NOP instruction #0. See Table XI

X ••• X X

X ••• X

SAVE WIPER SETTING: Write contents of

RDAC to EEMEM. See Table X

A3 A2 A1 A0

D15 ••• D8

D7 ••• D0

Write contents of Serial Register Data Bytes 0

and 1 (total 16-bit) to EEMEM(ADDR).

See Table XIII

X ••• X X

X ••• X

Decrement 6 dB: Right Shift contents of

RDAC, stops at all “Zeros.”

X X X X

X ••• X X

X ••• X

Same as instruction 4

X ••• X X

X ••• X

Decrement content of RDAC Register by “One,”

stops at all “Zeros.”

X X X X

X ••• X X

X ••• X

Same as instruction 6

X X X X

X ••• X X

X ••• X

RESET: Load RDAC with its corresponding

EEMEM previously saved value.

A3 A2 A1 A0

X ••• X X

X ••• X

Write content of EEMEM(ADDR) to Serial

See Table XIV

X ••• X X

X ••• X

Write content of RDAC to Serial Register Data

Bytes 0 and 1. SDO activated. See Table XV

X ••• D9, D8

D7 ••• D0

Write content of Serial Register Data Bytes 0

and 1 (total 10-bit) to RDAC Register.

See Table IX

X ••• X X

X ••• X

Increment 6 dB: Left Shift content of RDAC,

stops at all “Ones.” See Table XII

135

X X X X

X ••• X X

X ••• X

Same as instruction 12

X ••• X X

X ••• X

Increment content of RDAC Register by “One,”

stops at all “Ones.” See Table X.

155

X X X X

X ••• X X

X ••• X

Same as instruction 14

NOTES

1The SDO output shifts out the last 24 bits of data clocked into the serial register for daisy-chain operation. Exception, any instruction following instruction #9 or #10,

the selected internal register data will be present in Data Bytes 0 and 1. The instruction following #9 and #10 must also be a full 24-bit data word to completely clock

out the contents of the serial register.

2The RDAC register is a volatile scratch pad register that is refreshed at power ON from the corresponding nonvolatile EEMEM register.

3Execution of the above operations takes place when the

CS strobe returns to logic high.

4Instruction #3 write two data bytes (16-Bit data) to EEMEM. In the case of 0 addresses, only the last 10 bits are valid for wiper position setting.

5The increment, decrement, and shift commands ignore the contents of the shift register Data Bytes 0 and 1.

Table II. AD5231 24-Bit Serial Data Word

MSB Instruction Byte 0

Data Byte 1

Data Byte 0

LSB

RDAC

C3 C2 C1 C0 000A0 XXXXXXD9 D8 D7 D6 D5 D4 D3 D2 D1 D0

EEMEM

C3 C2 C1 C0 A3 A2 A1 A0 DDDDDDD9 D8 D7 D6 D5 D4 D3 D2 D1 D0

15 14 13 12 11 10

Command bits are C0 to C3. Address bits are A3 to A0. Data bits D0 to D9 are applicable to RDAC; D0 to D15 are applicable to EEMEM. Command

instruction codes are defined in Table III.

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