AM29BDD160G datasheet(52/80 Pages) AMD

52 / 80 page

Am29BDD160G

RD(0) = Read Data DQ0 protection indicator bit. If pro-

tected, DQ0 = 1, if unprotected, DQ0 = 0.

RD(1) = Read Data DQ1 protection indicator bit. If pro-

tected, DQ1 = 1, if unprotected, DQ1 = 0.

SA = Sector Address where security command applies. Ad-

dress bits A18:A11 uniquely select any sector.

SL = Persistent Protection Mode Lock Address (A5–A0) is

(010X10)

WP = PPB Address (A5–A0) is (111X10)

X = Don’t care

PPMLB = Password Protection Mode Locking Bit

SPMLB = Persistent Protection Mode Locking Bit

1. 1. See Table 1 for description of bus operations.

2. 2.All values are in hexadecimal.

3. 3.Shaded cells in table denote read cycles. All other

cycles are writer operations.

4. During unlock cycles, (lower address bits are AAA or

555h as shown in the table) address bits higher that A11

(except where BA is required) and data bits higher than

DQ7 are dont’s cares.

5. The reset command returns the device to reading the

array.

6. The fourth cycle programs the addressed locking bit. The

fifth and sixth cycles are used to validate whether the bit

is fully programmed. If DQ0 (in the sixth cycle) reads 0,

the program command must be issued and verified

again.

7. Data is latched on the rising edge of WE#.

8. The entire four bus-cycle sequence must be entered for

each portion of the password. PWA (0-3) represent the

four addresses over which the password is stored. PWD

(0-3) represent the four word data that comprise the

password.

9. The fourth cycle erases all PPBs. The fifth and sixth

cycles are used to validate whether the bits are fully

erased. If DQ0 (in the sixed cycle) reads 1, the erase

command must be issued and verified again.

10. Before issuing the erase command, all PPBs should be

programmed in order to prevent over-erasure of PPBs.

11. In the fourth cycle, 00h indicates PPB set; 01h indicates:

PPB not set.

12. The status of additional PPBs and DYBs may be read

(following the fourth cycle) without reissuing the entire

command sequence

AM29BDD160G датащи(PDF) 52 Page - Advanced Micro Devices

AM29BDD160G датащи(HTML) 52 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

датащи скачать

ссылки URL