Dual 12-/14-/16-Bit,

LVDS Interface, 500 MSPS DACs

Data Sheet

AD9780/AD9781/AD9783

Rev. C

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FEATURES

High dynamic range, dual DAC parts

Low noise and intermodulation distortion

Single carrier W-CDMA ACLR = 80 dBc at 61.44 MHz IF

Innovative switching output stage permits usable outputs

beyond Nyquist frequency

LVDS inputs with dual-port or optional interleaved single-

port operation

Differential analog current outputs are programmable from

8.6 mA to 31.7 mA full scale

Auxiliary 10-bit current DACs with source/sink capability for

external offset nulling

Internal 1.2 V precision reference voltage source

Operates from 1.8 V and 3.3 V supplies

315 mW power dissipation

Small footprint, RoHS compliant, 72-lead LFCSP

APPLICATIONS

Wireless infrastructure

W-CDMA, CDMA2000, TD-SCDMA, WiMAX

Wideband communications

LMDS/MMDS, point-to-point

RF signal generators, arbitrary waveform generators

GENERAL DESCRIPTION

The AD9780/AD9781/AD9783 include pin-compatible, high

dynamic range, dual digital-to-analog converters (DACs) with

12-/14-/16-bit resolutions, and sample rates of up to 500 MSPS.

The devices include specific features for direct conversion transmit

applications, including gain and offset compensation, and they

interface seamlessly with analog quadrature modulators such as

the ADL5370.

A proprietary, dynamic output architecture permits synthesis

of analog outputs even above Nyquist by shifting energy away

from the fundamental and into the image frequency.

Full programmability is provided through a serial peripheral

interface (SPI) port. Some pin-programmable features are also

offered for those applications without a controller.

PRODUCT HIGHLIGHTS

1.

Low noise and intermodulation distortion (IMD) enable

high quality synthesis of wideband signals.

2.

Proprietary switching output for enhanced dynamic

performance.

3.

Programmable current outputs and dual auxiliary DACs

provide flexibility and system enhancements.

FUNCTIONAL BLOCK DIAGRAM

GAIN

DAC

GAIN

DAC

OFFSET

DAC

OFFSET

DAC

16-BIT

I DAC

16-BIT

Q DAC

INTERFACE LOGIC

INTERNAL

REFERENCE

AND

BIAS

SERIAL

PERIPHERAL

INTERFACE

CLKP

CLKN

LVDS

INTERFACE

D[15:0]

AUX2N

AUX2P

AUX1N

AUX1P

IOUT2N

IOUT2P

IOUT1N

IOUT1P

AD9783 DUAL LVDS DAC

Figure 1.