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AD5293

Data Sheet

Rev. E | Page 18 of 24

THEORY OF OPERATION

The AD5293 digital potentiometer is designed to operate as

a true variable resistor for analog signals that remain within

the terminal voltage range of VSS < VTERM < VDD. The patented

±1% resistor tolerance feature helps to minimize the total RDAC

resistance error, which reduces the overall system error by

offering better absolute matching and improved open-loop

performance. The digital potentiometer wiper position is

determined by the RDAC register contents. The RDAC register

acts as a scratchpad register, allowing as many value changes

as necessary to place the potentiometer wiper in the correct

position. The RDAC register can be programmed with any

position setting via the standard serial peripheral interface (SPI)

by loading the 16-bit data-word.

SERIAL DATA INTERFACE

The AD5293 contains a serial interface (SYNC, SCLK, DIN, and

SDO) that is compatible with SPI standards, as well as most DSPs.

The device allows data to be written to every register via the SPI.

SHIFT REGISTER

The AD5293 shift register is 16 bits wide (see Figure 2). The 16-bit

data-word consists of two unused bits, which are set to 0, followed

by four control bits and 10 RDAC data bits. Data is loaded MSB

first (Bit 15). The four control bits determine the function of the

software command (see Table 11). Figure 3 shows a timing diagram

of a typical write sequence.

The write sequence begins by bringing the SYNC line low. The

SYNC pin must be held low until the complete data-word is loaded

from the DIN pin. When SYNC returns high, the serial data-word

is decoded according to the instructions in Table 11. The

command bits (Cx) control the operation of the digital

potentiometer. The data bits (Dx) are the values that are loaded

into the decoded register. The AD5293 has an internal counter

that counts a multiple of 16 bits (per frame) for proper operation.

For example, the AD5293 works with a 32-bit word, but it cannot

work properly with a 31- or 33-bit word. The AD5293 does not

require a continuous SCLK, when SYNC is high, and all interface

pins should be operated close to the supply rails to minimize

power consumption in the digital input buffers.

RDAC REGISTER

The RDAC register directly controls the position of the digital

potentiometer wiper. For example, when the RDAC register is

loaded with all zeros, the wiper is connected to Terminal B of the

variable resistor. The RDAC register is a standard logic register;

there is no restriction on the number of changes allowed. The RDY

pin can be used to monitor the completion of a write to or read

from the RDAC register. The AD5293 presets to midscale on

power-up.

WRITE PROTECTION

On power-up, the serial data input register write command for

the RDAC register is disabled. The RDAC write protect bit, C1

of the control register (see Table 12 and Table 13), is set to 0 by

default. This disables any change of the RDAC register content,

regardless of the software commands, except that the RDAC register

can be refreshed to midscale using the software reset command

(Command 3, see Table 11) or through hardware, using the

RESET pin. To enable programming of the variable resistor wiper

position (programming the RDAC register), the write protect bit,

C1 of the control register, must first be programmed. This is

accomplished by loading the serial data input register with

Command 4 (see Table 11).

BASIC OPERATION

The basic mode of setting the variable resistor wiper position

(programming the RDAC register) is accomplished by loading the

serial data input register with Command 1 (see Table 11) and the

desired wiper position data. The RDY pin can be used to monitor

the completion of this RDAC register write command. Command 2

can be used to read back the contents of the RDAC register (see

Table 11). After issuing the readback command, the RDY pin

can be monitored to indicate when the data is available to be

read out on SDO in the next SPI operation. Instead of monitoring

the RDY pin, a minimum delay can be implemented when

executing a write or read command (see Table 5). Table 9

provides an example listing of a sequence of serial data input

(DIN) words with the serial data output appearing at the SDO

pin in hexadecimal format for an RDAC write and read.

Table 9. RDAC Register Write and Read

DIN

SDO

Action

0x1802

0xXXXX1

Enable update of wiper position.

0x0500

0x1802

Write 0x100 to the RDAC register.

Wiper moves to ¼ full-scale position.

0x0800

0x0500

Prepare data read from RDAC register.

0x0000

0x0100

NOP (Instruction 0) sends a 16-bit word

out of SDO, where the last 10 bits contain

the contents of the RDAC register.

X = unknown.

SHUTDOWN MODE

The AD5293 can be placed in shutdown mode by executing the

software shutdown command (see Command 6 in Table 11), and

setting the LSB to 1. This feature places the RDAC in a special state

in which Terminal A is open-circuited and Wiper W is connected

to Terminal B. The contents of the RDAC register are unchanged

by entering shutdown mode. However, all commands listed in

Table 11 are supported while in shutdown mode.

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