GMS77C1001 datasheet(25/44 Pages) HYNIX

25 / 44 page

GMS77C1000/GMS77C1001

July. 2001 Ver. 1.1

9.3.7 OPTION Register

The OPTION register consists of 8-bit write-only register

and can not addressed. This register is able to control the

status of PFD, TMR0/WDT prescaler and TMR0.

To modify the OPTION register, the content of W register

are transferred to the OPTION register by executing the

OPTION instruction.

In reset state, the OPTION register is initialized with

“00111111B” .

FIGURE 9-9 FSR REGISTER AND DIRECT/INDIRECT ADDRESSING MODE

FSR

Address : 04H

Indirect Addressing mode

Direct Addressing mode

Data Memory Address

Instruction Word

OPCODE

RESET Value: 1XXX_XXXXB

FIGURE 9-10 OPTION REGISTER

LOWOPT

PFDEN

T0CS

T0SE

PSA

PS2

PS1

PS0

bit7

bit0

432

LOWOPT:

Power-fail detection level select bit.

1 = Lowered detection level (2.5V @ 5V)

0 = Normal detection level (3V @ 5V)

PFDEN:

Power-fail detection enable bit

1 = Enable power-fail detection

0 = Disable power-fail detection

T0CS:

Timer 0 clock source select bit

1 = Transition on EC0 pin

0 = Internal instruction cycle clock

T0SE:

Timer 0 source edge select bit

1 = Increment on high-to-low transition on

EC0

0 = Increment on low-to-high transition on

EC0

PSA:

Prescaler assignment bit

1 = Prescaler assigned to the WDT

0 = Prescaler assigned to the Timer 0

PS2-PS0:

Prescaler rate select bits)

Bit Value

Timer 0 rate

WDT rate

000

1:2

1:2 (Typ. 28mS)

001

1:4

1:4 (Typ. 56mS)

010

1:8

1:8 (Typ. 112mS)

011

1:16

1:16 (Typ. 224mS)

100

1:32

1:32 (Typ. 448mS)

101

1:64

1:64 (Typ. 896mS)

110

1:128

1:128 (Typ. 1792mS)

111

1:256

1:256 (Typ. 3584mS)

W = Writable bit

-n = Value at POR reset

ADDRESS ; 03H

RESET VALUE : 0011_1111

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