8431AM-21

www.icst.com/products/hiperclocks.html

REV. A APRIL 27, 2005

10

Integrated

Circuit

Systems, Inc.

ICS8431-21

TO

The schematic of the ICS8431-21 layout example used in this

layout guideline is shown in

Figure 5A. The ICS8431-21 rec-

ommended PCB board layout for this example is shown in

Figure 5B. This layout example is used as a general guideline.

The layout in the actual system will depend on the selected

component types and the density of the P.C. board.

C4

10uF

U1

ICS8431-21

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

28

27

26

25

M0

M1

M2

M3

M4

M5

M6

M7

M8

SSC_CTL0

SSC_CTL1

VEE

TEST_IO

VCC

VEE

nFOUT

FOUT

VCCO

DIV_SEL

MR

VEE

VCCA

NC

NC

nP_LOAD

VCC

XTAL_IN

XTAL_OUT

R5

10

C6

0.01uF

C3

0.01uF

R3

125

C7

22pF

VCC

VCC

Zo = 50 Ohm

C2

0.1uF

RD2

1K

R4

84

To Logic

Input

pins

To Logic

Input

pins

RU1

1K

RD1

SP

Logic Input Pin Examples

VCC=3.3V

VCC

Zo = 50 Ohm

C8

22pF

Set Logic

Input to

'0'

RU2

SP

R1

125

X1

VCC

VCCA

Set Logic

Input to

'1'

C1

0.1uF

+

-

VCC

SP=Spare, not installed

VCC

R2

84

VCC