FUSB303

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15

Table 17. CONTROL1

(Address: 05h, Reset Value: 1011_0011b, Type: Read/Write)

Bit #

Name

Size (Bits)

Description

7

REMEDY_EN

1

1: Enable the Remedy detection to employ internal methods to

achieve stable attach

6:5

AUTO_SNK_TH

[1:0]

2

Sets the weak battery VDD threshold voltage when

AUTO_SNK_EN is enabled.

00: 3.0 V

01: 3.1 V

10: 3.2 V

11: 3.3 V

4

AUTO_SNK_EN

1

1: Enable automatic Sink port role based on weak battery VDD

threshold in bits AUTO_SNK_TH in Control register below

3

ENABLE

1

mode (that is, not in GPIO mode)

2:0

TCCDEB[2:0]

3

Controls debounce time for attaching a device

000: 120 ms

001: 130 ms

010: 140 ms

011: 150 ms

100: 160 ms

101: 170 ms

110: 180 ms

111: Reserved

(Address: 09h, Reset Value: 0000_0000b, Type: Read/Write (see bits below: W/C = Write one self clearing, R/W = Read/Write and N/A =

Not Applicable)

Bit #

Name

R/W/C

Size (Bits)

Description

7:6

Reserved

N/A

2

Do Not Use

5

FORCE_SRC

W/C

1

1: Forces the FUSB303 to behave as a Source

4

FORCE_SNK

W/C

1

1: Forces the FUSB303 to behave as a Sink

3

UNATT_SNK

W/C

1

1: Put device in Unattached.SNK State as defined in the Type C spec

2

UNATT_SRC

W/C

1

1: Put device in Unattached.SRC state as defined in the Type C spec

1

DISABLED

(Note 11)

R/W

1

1: Put device in Disabled state as defined in the Type C spec

0

ERROR_REC

W/C

1

1: Put device in ErrorRecovery state as defined in the Type C spec

10. If more than one bit is set to 1b simultaneously then an order of priority will be used. First priority is DISABLED, second is ERROR_REC,

third is FORCE_SRC, fourth is FORCE_SNK, fifth is UNATT_SRC, last is UNATT_SNK. The highest priority bit will take precedence and

all other bits will be cleared automatically.

11. The DISABLED bit must be manually cleared. Also DISABLED bit has a higher priority over Portrole register since the DISABLED bit has

to be cleared in order to execute the new Portrole register settings. However, all other Manual register bits don’t have a lot of meaning if

the Portrole register is changed and so Portrole register setting should have higher priority than all bits except for DISABLED bit.

Table 19. RESET

(Address: 0Ah, Reset Value: 0000_0000b, Type: Write/Clear)

Bit #

Name

Size (Bits)

Description

7:1

Reserved

7

Do Not Use

0

SW_RES

1