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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PC87383 датащи(PDF) 21 Page - National Semiconductor (TI) |
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PC87383 датащи(HTML) 21 Page - National Semiconductor (TI) |
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21 / 77 page  3.0 Device Architecture and Configuration (Continued) Revision 1.1 21 www.national.com 3.2.3 Standard Configuration Register Definitions In the registers below, any undefined bit is reserved. Unless otherwise noted, the following definitions also hold true: q All registers are read/write. q All reserved bits return 0 on reads, except where noted otherwise. To prevent unpredictable results, do not modify these bits. Use read-modify-write to prevent the values of reserved bits from being changed during write. q Write-only registers must not use read-modify-write during updates. Table 9. Standard General Configuration Registers Index Register Name Description 07h Logical Device Number This register selects the current logical device. See Table 8 for valid numbers. All other values are reserved. 20h-2Fh PC87383 Configuration PC87383 configuration registers and ID registers. Table 10. Logical Device Activate Register Index Register Name Description 30h Activate Bits 7-1: Reserved. Bit 0: Logical device activation control; see Section 3.3 on page 25. 0: Disabled. 1: Enabled. Table 11. I/O Space Configuration Registers Index Register Name Description 60h I/O Port Base Address Bits 15-8 Descriptor 0 Indicates selected I/O lower limit address bits 15-8 for I/O Descriptor 0. 61h I/O Port Base Address Bits 7-0 Descriptor 0 Indicates selected I/O lower limit address bits 7-0 for I/O Descriptor 0. |
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