20

ATSAM9753

1774D–DRMSD–11/02

GPIO

The pins GPIO[3:0] in normal mode are controlled by the ATSAM97xx configuration and

control/status registers (refer to prgdvkit.pdf).

The ATSAM9753 additional GPIO control/status register controls GPIO[3:0] alternate

mode and GPIO4 normal and alternate mode.

The GPIO register is located at address 0xF in the I/O mapping.

Note:

1. Only available in Debug Mode.

Note:

1. In alternate output mode, GPIO0 = ROW3.

Refer to description of pins ROW[2:0] in Table 1 on page 3.

Note:

1. In alternate output mode, GPIO2 is configured as input and assumed as DBCLK

(ATSAM9753_GPIO[0]).

Table 16. GPIO Mapping

7X

x

6

GPIO4 Output Enable

x

5

GPIO1 Alt

x

4

GPIO0 Alt

x

3

GPIO4 Data

Debug/ pin

2

GPIO4 Alt data (DBOUT)

(1)

GPIO4 pin (DBDATA)

(1)

1

GPIO3 Alt data (DBACK)

(1)

GPIO Reg[1] (DBACK)

(1)

0

GPIO4 Output Enable

(1)

GPIO4 Input Enable

(1)

Table 17. GPIO0

Normal

Input Mode

Normal

Output Mode

Alt Output

Mode

(1)

ATSAM97xx_config_Reg[0] (I/O add0)

0

1

1

ATSAM9753_GPIO_Reg[4] (I/O addF)

x

0

1

Table 18. GPIO1

Normal

Input Mode

Normal

Output Mode

Alt Output

Mode

(1)

ATSAM97xx_config_Reg[1]

0

1

1

ATSAM9753_GPIO_Reg[5]

x

0

1

Table 19. GPIO2

Normal

Input Mode

Normal

Output Mode

Alt Output

Mode

(1)

ATSAM97xx_config_Reg[2]

0

1

x

DEBUG Pin

110