16

ATSAM9753

1774D–DRMSD–11/02

ATSAM9753

Operation

The reader is assumed to be familiar with the functioning of the ATSAM97xx series.

Refer to the ATSAM9707 product development kit “prgdvkit.pdf” document. This docu-

ment can be obtained under special conditions from Atmel.

This section describes operation and registers specific to ATSAM9753.

Memory Mapping

I/O Mapping

The I/O Mapping Table refers to the ATSAM9707 product development kit “prgdvkit.pdf”

available from Atmel.

LCD Interface

The ATSAM9753 can be directly connected to most LCD displays.

The ATSAM9753 provides an 8-bit data bus (DB[7:0]) and three output control pins RS,

RW and ENB.

All the LCD pins are controlled by I/O access ADD OAH. The I/O reads only the 8-bit

data bus. The I/O writes into the 11-bit LCD_Reg. Refer to Table 11 and Table 12.

Table 9. Memory Mapping

Size

(in words)

Address Low

Address High

Access

256

000:0000

000:00FF

ATSAM97xx standard routine ROM

768

000:0100

000:03FF

Built in debug ROM

32M - 1K

000:0400

1FF:FFFF

External ROM/Flash (CS0)

32K

200:0000

200:7FFF

Built in SRAM

4K

200:8000

200:8FFF

External memory page XIO0 (XIO0)

4K

200:9000

200:9FFF

External memory page XIO1 (XIO1)

216K

200:A000

203:FFFF

Not used

32M - 256K

204:0000

2FF:FFFF

External SRAM (CS1)

Table 10. I/O Mapping

Write

Read

Access

00 - 09

00 - 09

Standard ATSAM97xx I/O (Refer to

prgdvkit.pdf)

0A

0A

LCD port

0B

X

Keyboard configuration

0C - 0E

0C - 0E

Scanning port ADD0 - 2

0F

0F

GPIO control/status

Table 11. LCD Interface

LCD_Reg[7:0]

DB[7:0]

LCD_Reg[8]

RS

LCD_Reg[9]

RW

LCD_Reg[10]

ENB