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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PEF22504HT датащи(PDF) 98 Page - Infineon Technologies AG |
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PEF22504HT датащи(HTML) 98 Page - Infineon Technologies AG |
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98 / 255 page  QuadLIU TM PEF 22504 Functional Description Data Sheet 98 Rev. 1.3, 2006-01-25 3.7.8.3 Output Jitter In the absence of any input jitter the QuadLIU TM generates the intrinsic output jitter, which is specified in theTable 25 below. 3.7.8.4 Output Wander Figure 34 shows 2 curves for the output wander. For both, setting of the register bits of GCM1 to GCM8 is identical to Table 49. Curve 1 gives the default output wander were no additional programming of bits of registers GPC6, REGFP, REGFD and WCON is necessary as described below. The corner frequency of the DCO-R is 2 Hz (see Table 23). Figure 34 Output Wander For further improvement of the output wander (curve 2), the following programming of register bits must be done: • GPC6. WAND_IMP = ´1´ • WCON.WAND = ´03 H´ After that, the global registers REGFP and REGFD must be written with the following sequence to improve the output wander for both channels: • Write ´30 H´ into REGFP • Write ´AA H´ into REGFD • Write ´B0 H´ into REGFP • Write ´31 H´ into REGFP Table 25 Output Jitter Specification Measurement Filter Bandwidth Intrinsic Output Jitter (UI peak to peak) Lower Cutoff Upper Cutoff ITU-T I.431 20 Hz 100 kHz < 0.015 700 Hz 100 kHz < 0.015 ETSI TBR 12 40 Hz 100 kHz < 0.11 PUB 62411 10 Hz 8 kHz < 0.015 8 Hz 40 kHz < 0.015 10 Hz 40 kHz < 0.015 Broadband < 0.02 |
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