OXCB950 datasheet(13/68 Pages) ETC

13 / 68 page

Data Sheet Revision 1.1

Page 13

OXCB950

OXFORD SEMICONDUCTOR LTD.

6.2

Configuration space

The OXCB950 is a single function device, with one PCI

configuration space (and for the default cardbus mode, one

cardbus information structure).

All the required fields in the predefined PCI header region

have been implemented. This includes those fields in the

cardbus PC Card Standard that are termed “allocated” and

“reserved” for cardbus applications. This implementation is

a specific requirement for cardbus support in Windows 9x.

The device dependant region of the PCI configuration

space contains the cardbus/pci Power Management

Extended Capability register set and (for the cardbus mode

only) the Tuples making up the Cardbus Information

Structure.

The format of the PCI configuration space, for cardbus and

pci modes, is as shown in the Table below.

In general, writes to any registers that are not implemented

are ignored, and all reads from unimplemented registers

return 0.

6.2.1

Cardbus / PCI Configuration Space Register map

Configuration Register Description

Offset

Address

Device ID

Vendor ID

00h

Status

Command

04h

Class Code

Revision ID

08h

BIST1

Header Type

Reserved

0Ch

Base Address Register 0 (BAR0) – UART Function in I/O space

10h

Base Address Register 1 (BAR 1) - UART Function in Memory space

14h

Base Address Register 2 (BAR 2) – Local Configuration Registers in IO space

18h

Base Address Register 3 (BAR3) – Local Configuration Registers in Memory space

1Ch

Base Address Register 4 (BAR4) – Cardbus Status Registers in Memory Space

Function Event : Offset +0

Function Event Mask : Offset +4

Function Present State : Offset +8

Function Force Event : Offset +12

20h

Reserved (Bar 5)

24h

Cardbus CIS Pointer

28h

Subsystem ID

Subsystem Vendor ID

2Ch

Reserved

30h

Reserved

Cap_Ptr

34h

Reserved

38h

Reserved

Interrupt Pin

Interrupt Line

3Ch

Predefined PCI Header Region

Device Dependant PCI Region

Power Management Capabilities (PMC)

Next Ptr

Cap_ID

40h

Reserved

PMC Control/Status Register (PMCSR)

44h

Tuple Byte3*

Tuple Byte 2*

Tuple Byte1*

Tuple Byte 0*

48h

…

Tuple Byte (n+1)*

Tuple Byte n*

4Ch

* Tuples are available for the Cardbus mode only. These fields return all 0’s for the PCI mode of the device.

Table 2: Cardbus/PCI Configuration space

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