поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

AM3351 датащи(PDF) 79 Page - Texas Instruments

Click here to check the latest version.
номер детали AM3351
подробное описание детали  Sitara Processors
PDF  252 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI1 - Texas Instruments

AM3351 датащи(HTML) 79 Page - Texas Instruments

Back Button AM3351 Datasheet HTML 75Page - Texas Instruments AM3351 Datasheet HTML 76Page - Texas Instruments AM3351 Datasheet HTML 77Page - Texas Instruments AM3351 Datasheet HTML 78Page - Texas Instruments AM3351 Datasheet HTML 79Page - Texas Instruments AM3351 Datasheet HTML 80Page - Texas Instruments AM3351 Datasheet HTML 81Page - Texas Instruments AM3351 Datasheet HTML 82Page - Texas Instruments AM3351 Datasheet HTML 83Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 79 / 252 page
background image
79
AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351
www.ti.com
SPRS717J – OCTOBER 2011 – REVISED APRIL 2016
Submit Documentation Feedback
Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351
Specifications
Copyright © 2011–2016, Texas Instruments Incorporated
5
Specifications
5.1
Absolute Maximum Ratings
over junction temperature range (unless otherwise noted)
(1)(2)
MIN
MAX
UNIT
VDD_MPU(3)
Supply voltage for the MPU core domain
–0.5
1.5
V
VDD_CORE
Supply voltage for the core domain
–0.5
1.5
V
CAP_VDD_RTC(4)
Supply voltage for the RTC core domain
–0.5
1.5
V
VPP(5)
Supply voltage for the FUSE ROM domain
–0.5
2.2
V
VDDS_RTC
Supply voltage for the RTC domain
–0.5
2.1
V
VDDS_OSC
Supply voltage for the System oscillator
–0.5
2.1
V
VDDS_SRAM_CORE_BG
Supply voltage for the Core SRAM LDOs
–0.5
2.1
V
VDDS_SRAM_MPU_BB
Supply voltage for the MPU SRAM LDOs
–0.5
2.1
V
VDDS_PLL_DDR
Supply voltage for the DPLL DDR
–0.5
2.1
V
VDDS_PLL_CORE_LCD
Supply voltage for the DPLL Core and LCD
–0.5
2.1
V
VDDS_PLL_MPU
Supply voltage for the DPLL MPU
–0.5
2.1
V
VDDS_DDR
Supply voltage for the DDR I/O domain
–0.5
2.1
V
VDDS
Supply voltage for all dual-voltage I/O domains
–0.5
2.1
V
VDDA1P8V_USB0
Supply voltage for USBPHY
–0.5
2.1
V
VDDA1P8V_USB1(6)
Supply voltage for USBPHY
–0.5
2.1
V
VDDA_ADC
Supply voltage for ADC
–0.5
2.1
V
VDDSHV1
Supply voltage for the dual-voltage I/O domain
–0.5
3.8
V
VDDSHV2(6)
Supply voltage for the dual-voltage I/O domain
–0.5
3.8
V
VDDSHV3(6)
Supply voltage for the dual-voltage I/O domain
–0.5
3.8
V
VDDSHV4
Supply voltage for the dual-voltage I/O domain
–0.5
3.8
V
VDDSHV5
Supply voltage for the dual-voltage I/O domain
–0.5
3.8
V
VDDSHV6
Supply voltage for the dual-voltage I/O domain
–0.5
3.8
V
VDDA3P3V_USB0
Supply voltage for USBPHY
–0.5
4
V
VDDA3P3V_USB1(6)
Supply voltage for USBPHY
–0.5
4
V
USB0_VBUS(7)
Supply voltage for USB VBUS comparator input
–0.5
5.25
V
USB1_VBUS(6)(7)
Supply voltage for USB VBUS comparator input
–0.5
5.25
V
DDR_VREF
Supply voltage for the DDR SSTL and HSTL reference voltage
–0.3
1.1
V
Steady state max voltage
at all I/O pins(8)
–0.5 V to I/O supply voltage + 0.3 V
USB0_ID(9)
Steady state maximum voltage for the USB ID input
–0.5
2.1
V
USB1_ID(6)(9)
Steady state maximum voltage for the USB ID input
–0.5
2.1
V
Transient overshoot and
undershoot specification at
I/O terminal
25% of corresponding I/O supply
voltage for up to 30% of signal
period
Latch-up performance(10)
Class II (105°C)
45
mA
Storage temperature,
Tstg
(11)
–55
155
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to their associated VSS or VSSA_x.
(3) Not available on the ZCE package. VDD_MPU is merged with VDD_CORE on the ZCE package.
(4) This supply is sourced from an internal LDO when RTC_KALDO_ENn is low. If RTC_KALDO_ENn is high, this supply must be sourced
from an external power supply.
(5) During functional operation, this pin is a no connect.
(6) Not available on the ZCE package.
(7) This terminal is connected to a fail-safe I/O and does not have a dependence on any I/O supply voltage.
(8) This parameter applies to all I/O terminals which are not fail-safe and the requirement applies to all values of I/O supply voltage. For
example, if the voltage applied to a specific I/O supply is 0 volts the valid input voltage range for any I/O powered by that supply will be
–0.5 to +0.3 V. Apply special attention anytime peripheral devices are not powered from the same power sources used to power the



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com