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LTM8049 датащи(PDF) 3 Page - Linear Technology |
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LTM8049 датащи(HTML) 3 Page - Linear Technology |
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3 / 34 page ![]() LTM4651 3 4651f For more information www.linear.com/LTM4651 The l denotes the specifications which apply over the specified internal operating temperature range (Note 2). TA = 25°C, Test Circuit 1, VIN = 24V and electrically connected to SVIN and RUN, ISETa – SVOUT– = 24V, EXTVCC = PGND, CLKIN open circuit, RfSET = 57.6kΩ and RISET = 480kΩ and voltages referred to PGND unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS SVIN(DC), VIN(DC) Input DC Voltage VIN+ |VOUT–| ≤ 58V l 3.6 58 V VOUT(RANGE)– Range of Output Voltage Regulation 0.5V ≤ ISETa – SVOUT– ≤ 26.5V l –26.5 –0.5 V VOUT(–24VDC)– Output Voltage Total Variation with Line and Load at VOUT– = –24V 3.6V ≤ VIN ≤ 34V, 0A ≤ IOUT– ≤ 0.3A, CLKIN Driven per Note 6, CINH = 4.7μF, CD = 4.7μF × 2, COUTH = 47μF × 2 l –24.4 –24 –23.6 V VOUT(–5VDC)– Output Voltage Total Variation with Line and Load at VOUT– = –5V Measuring GNDSNS – ISETa 12V ≤ VIN ≤ 53V, 0A ≤ IOUT– ≤ 3A, CLKIN Driven by 550kHz Clock, CINH = 4.7μF, CD = 4.7μF × 2, COUTH = 47μF × 2, ISETa – SVOUT– = 5V l –15 0 15 mV VOUT(–0.5VDC)– Output Voltage Total Variation with Line and Load at VOUT– = –0.5V Measuring GNDSNS – ISETa 3.6V ≤ VIN ≤ 28V, 0A ≤ IOUT– ≤ 2A, CINH = 4.7μF, CD = 4.7μF × 2, COUTH = 47μF × 2, RfSET = N/U, ISETa – SVOUT– = 500mV, CLKIN Driven by 200kHz Clock (Note 5) l –15 0 15 mV Input Specifications VIN(UVLO) SVIN Undervoltage Lockout Threshold SVIN Rising SVIN Falling Hysteresis l l l 2.1 400 3.2 2.5 700 3.6 2.8 V V mV VIN(OVLO) SVIN Overvoltage Lockout Rising (Note 4) 64 68 V VIN(HYS) SVIN Overvoltage Lockout Hysteresis (Note 4) 2 4 V IINRUSH(VIN) Input Inrush Current at Start-Up CINH = 4.7μF, CD = 4.7μF × 2, COUTH = 47μF × 2; IOUT– = 0A, ISETa Electrically Connected to ISETb 1.1 A IQ(SVIN) Input Supply Bias Current Shutdown, RUN = GND RUN = VIN 16 450 30 μA μA IS(VIN) Input Supply Power Converter CLKIN Open Circuit, IOUT– = 2A 2.3 A IS(VIN, SHUTDOWN) Input Supply Current in Shutdown Shutdown, RUN = GND 4 µA Output Specifications IOUT– VOUT– Output Continuous Current Range From VIN = 24V, Regulating VOUT– = –24V at fSW = 1.5MHz From VIN = 12V, Regulating VOUT– = –5V at fSW = 550kHz (See Note 3, Capable of Up to 4A Output Current for Some Combinations of VIN, VOUT–, and fSW) 0 0 2 3 A A ∆VOUT(LINE)–/VOUT– Line Regulation Accuracy IOUT– = 0A, 3.6V ≤ VIN ≤ 34V, ISETa – SVOUT– = 24V, CLKIN Driven by 1.8MHz Clock l 0.05 0.25 % ∆VOUT(LOAD)–/VOUT– Load Regulation Accuracy VIN = 24V, 0A ≤ IOUT– ≤ 2A, CLKIN Driven by 1.5MHz Clock, RfSET = 57.6kΩ, and RISET = 480kΩ l 0.05 0.5 % VOUT(AC)– Output Voltage Ripple, VOUT– VIN = 12V, ISETa – SVOUT– = 5V 10 mVP–P fs VOUT Ripple Frequency VIN = 12V, ISETa – SVOUT– = 5V l 1.7 1.95 2.2 MHz ∆VOUT(START)– Turn-On Overshoot 8 mV tSTART Turn-On Start-Up Time Delay Measured from VIN Toggling from 0V to 24V to PGOOD Exceeding 3V Above GND; PGOOD Having a 100kΩ Pull-Up to 3.3V with Respect to GND, VPGFB Resistor-Divider Network as Shown in Test Circuit 1, RISETa = 480kΩ, ISETa Electrically Connected to ISETb, and CLKIN Driven with 1.2MHz Clock l 4 9 ms ∆VOUT(LS)– Peak Output Voltage Deviation for Dynamic Load Step IOUT–: 0A to 1A and 1A to 0A Load Steps in 1μs, COUTH = 47µF × 2 X5R 400 mV tSETTLE Settling Time for Dynamic Load Step IOUT–: 0A to 0.5A and 0.5A to 0A Load Steps in 1μs, COUTH = 47µF × 2 X5R 50 µs ELECTRICAL CHARACTERISTICS |
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