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LTM8049 датащи(PDF) 13 Page - Linear Technology |
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LTM8049 датащи(HTML) 13 Page - Linear Technology |
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13 / 34 page ![]() LTM4651 13 4651f For more information www.linear.com/LTM4651 The typical LTM4651 application circuit is shown in Test Circuit 1. External component selection is primarily deter- mined by the maximum load current and output voltage. Refer to Table 8 for recommended external component values. Output Current Capability Varies as a Function of VIN to VOUT– Conversion Ratios The output current capability of the LTM4651 has a strong dependencyontheoperatinginput(VIN)andoutput(VOUT–) voltages, as highlighted in the page 1 graph. The reason for this is inherent in the two-switch buck- boost topology employed by the LTM4651. To protect the primary power MOSFET (MT) from overstress (see Simplified Block Diagram), its peak current (IPK) is limited by control circuitry to 6A. When MT is on, observe that no current flows to LTM4651’s output; furthermore, observe that only when MT is off does current flow to the output of the LTM4651. As a consequence of this arrangement: for a given output voltage, current limit inception activates sooner at low line (higher, larger duty cycle) than at high line (lower, smaller duty cycle). A further consequence is: for a given input voltage, the output power capability of the LTM4651 is higher for lower-magnitude VOUT– (lower, smaller duty cycle) than for higher-magnitude VOUT– (higher,largerdutycycle).Thecombinationoftheseeffects is shown the plots in the page 1 graph and described by the following equation: IOUT(CAPABILITY) = VIN • IPK – ∆IPK–PK 2 •η VIN – VOUT– (1) where: ∆IPK-PK is the inductor ripple current, in amps, and η (unit less) is the efficiency of the LTM4651. APPLICATIONS INFORMATION For completeness, ∆IPK-PK is given by: where: L is 4μH, the LTM4651’s power inductor value, and fSW is the switching frequency of the LTM4651, in MHz. For a practical design, ∆IPK-PK is designed to be less than ~2APK-PK. For a practical design, the LTM4651’s on-time of MT each switching cycle should be designed to exceed the LTM4651 control loop’s specified minimum on-time of 60ns, tON(MIN), (guardband to 90ns) i.e.: D fSW > TON(MIN) (3) where D (unitless) is the duty-cycle of MT, given by: D= –VOUT– VIN – VOUT– (4) Combining EQ. 4 with EQ. 1, it can be illustrative to see: IOUT(CAPABILITY) =(1–D)• IPK – ∆IPK–PK 2 •η (5) In rare cases where the minimum on-time restriction is violated, the frequency of the LTM4651 automatically and gradually folds back down to one-fifth of its programmed switchingfrequencytoallowVOUT–toremaininregulation. Be reminded of Notes 2, 3 and 5 in the Electrical Char- acteristics section regarding output current guidelines. |
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