LTM2893/LTM2893-1

20

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For more information www.linear.com/LTM2893

CHAIN CONNECTING ADCs

Connecting multiple chain-capable ADCs is done with the

following guidelines. The ADC must have a chain-capable

SDI input. Set the ADC into a chain mode if necessary to

enable the passing of data through the SDI input to the

SDO output. Connect all the SCK clock signals in parallel

withastarconfigurationfromSCK2tominimizereflections

and path delays. Connect the CNV inputs from CNV2 in

a similar parallel star configuration. OR all BUSY signals

into the BUSY2 and BUSYS inputs. Pair the SDO outputs

to take advantage of the MISOA2 and MISOB2 data paths,

see Figure 6.

IntheConfigurationRegisters,selecttheappropriateword

length and device count. Select the appropriate SCK2

frequency for the chain mode. Some ADCs may require

a reduced SCK frequency in chain mode to account for

processingtheserialdatathroughtheirports.Setthedevice

count based on the word count; two chained devices will

require the word count to be two.

RF, Magnetic Field Immunity

TheisolatorµModuletechnologyusedwithintheLTM2893

hasbeenindependentlyevaluated,andsuccessfullypassed

the RF and magnetic field immunity testing requirements

per European Standard EN 55024, in accordance with the

following test standards:

EN 61000-4-3 Radiated, Radio-Frequency,

Electromagnetic Field Immunity

EN 61000-4-8 Power Frequency Magnetic Field

Immunity

EN 61000-4-9 Pulsed Magnetic Field Immunity

APPLICATIONS INFORMATION

Tests were performed using an un-shielded test card de-

signed per the data sheet PCB layout recommendations.

Specific limits per test are detailed in Table 8.

Table 8. Immunity Testing

TEST

FREQUENCY

FIELD STRENGTH

EN 61000-4-3 Annex D

80MHz to 1GHz

10V/m

1.4MHz to 2GHz

3V/m

2GHz to 2.7GHz

1V/m

EN 61000-4-8 Level 4

50Hz and 60Hz

30A/m

EN 61000-4-8 Level 5

60 Hz

100A/m*

EN 61000-4-9 Level 5

Pulse

1000A/m

*Non IEC method

PCB Layout

The high integration of the LTM2393 makes PCB layout

very simple. However, to maintain its electrical isolation

characteristics and signal integrity, some layout consid-

erations are necessary.

• Do not place copper on the PCB between the inner col-

umns of pads. This area must remain open to withstand

the rated isolation voltage.

• The edge rates of the ADC interface signals are between

300ps and 1ns. At these edge rates the routing must

be treated as a distributed transmission line for lengths

material, typically ~4.8. The isolated side pin-out is

organized for direct short connection to LTC2328,

LTC2338, and LTC2378 ADCs referenced in the typical

applications section. For longer lengths or branching

to multiple devices routing as a transmission line is

required.

Table 7. SPI Device Count or Word Count Selection Table (Configuration Register 1 Bits 4, 3)

NUMBER OF DEVICES

WORD COUNT

DEVICECOUNT1 (BIT 4)

DEVICECOUNT0 (BIT 3)

1-2

1

0

0

3-4

2

0

1

5-6

3

1

0

7-8

4

1

1