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MP5021 датащи(PDF) 15 Page - Monolithic Power Systems |
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MP5021 датащи(HTML) 15 Page - Monolithic Power Systems |
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15 / 19 page ![]() MP5021 – 12V, 7 mΩ RDSon HOT-SWAP PROTECTION DEVICE MP5021 Rev. 1.1 www.MonolithicPower.com 15 1/30/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. The SS capacitor value is given by ⋅ τ = SS SS SS 5 C R Where: τSS=soft start time RSS=1MΩ For example, a 100nF capacitor gives a soft-start time of 20ms. If the load capacitance is extremely large, the current required to maintain the preset soft-start time will exceed the current limit. Then the load capacitor and the current limit control the rise time. Float the SS pin to generate a fast ramp-up voltage. A 4μA current source pulls up the gate of the power FET. The gate charge current controls the output voltage rise time. The approximate soft-start time is about 1ms, which is the minimum soft-start time. Enable Pin and EN Blanking Time The EN pin enables the part when HIGH and disables the part when low. Floating the EN pin sets the part to auto-startup thanks to an internal 1μA pull-up current source. TIMER t VIN 1.23V EN VOUT ENTM t1 EN blanking time t2 Insertion delay 1.23V 1uA Figure 5: EN Blanking Time As shown in Figure 5, EN has a programmable blanking time of up to 1s that prevents EN from de-asserting during the blanking time. All fault functionality continues to operative during the start-up so that the power switch shuts down if a fault was detected; however, the switch will not turn off if EN goes LOW during this blanking time. At the end of the blanking time, EN behaves normally. Set the blanking time with a capacitor connected to the ENTM pin. The following estimates a value for the blanking timer capacitor: − τ⋅ = 6 ENB ENB 10 C 1.23 Where: τENB=EN blanking time CENB=EN blanking time capacitor For example, a 1μF capacitor gives a blanking time of 1.23s. Floating the ENTM pin generates a fast ramp-up voltage on the ENTM pin. The blanking time during this period is negligible. When EN enables the part, the insertion delay timer starts. When the insertion delay time ends, the internal 4μA current source charges the power FET’s gate. Charging takes about 1.5ms for VGS to reach its threshold. Then the output voltage rises following the SS-controlled slew rate. Damaged MOSFET Detection The MP5021 can detect a shorted pass FET during power-up by treating an output voltage that exceeds VIN-1V during power-up as a short on the MOSFET. The FLTB pin goes low to indicate a fault condition and the power switch remains off. Once the VOUT≤VIN-1, the part starts up normally. Internal VCC Sub-Regulator The MP5021 has an internal 5V linear sub- regulator that steps down the input voltage to generate a 5V power supply that powers low- voltage circuitry. The regulator is enabled when VIN exceeds its UVLO threshold and EN is high. In EN shutdown mode, the internal VCC regulator is disabled to reduce power dissipation. PD Pin When the PD pin connects to the output, the part is in pull-down mode. In this mode, when the enable pin is low, an integrated 500Ω pull-down |
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