MP8764 ― 12A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER WITH LATCH-OFF OCP

MP8764 Rev. 1.2

www.MonolithicPower.com

14

6/21/2016

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© 2016 MPS. All Rights Reserved.

information section for design steps with large

ESR capacitors.

R1

R2

ESR

POSCAP

SW

L

FB

Figure 6—Simplified Circuit in PWM Mode

without External Ramp Compensation

To realize the stability when no external ramp is

applied, usually the ESR value should be chosen

as follow:

OUT

ON

SW

ESR

C

2

T

7

.

0

T

R

+

π

×

≥

(4)

Ramp with Small ESR Capacitor

When the output capacitors are ceramic ones,

the ESR ripple is not high enough to stabilize the

system, and external ramp compensation is

needed. Skip to application information section

for design steps with small ESR caps.

R1

R2

Ceramic

SW

FB

L

R4

C4

R9

Figure 7—Simplified Circuit in PWM Mode

with External Ramp Compensation

In PWM mode, an equivalent circuit with HS-FET

off

and

the

use

of

an

external

ramp

compensation circuit (R4, C4) is simplified in

Figure 7. The external ramp is derived from the

inductor ripple current. If one chooses C4, R9,

R1 and R2 to meet the following condition:













+

+

×

×

<

×

×

π

9

R

2

R

1

R

2

R

1

R

5

1

4

C

F

2

1

SW

(5)

Where:

4

C

FB

4

C

4

R

I

I

I

I

≈

+

=

(6)

as:













+

×

×

×

−

=

9

R

2

R

//

1

R

2

R

//

1

R

T

4

C

4

R

V

V

V

ON

OUT

IN

RAMP

(7)

follows:

4

C

4

R

V

T

V

V

OUT

OFF

RAMP

1

SLOPE

×

−

=

=

(8)

As can be seen from equation 8, if there is

instability in PWM mode, we can reduce either

R4 or C4. If C4 can not be reduced further due to

limitation from equation 5, then we can only

reduce R4. For a stable PWM operation, the

SW

ON

3

ESR

OUT

OUT

SLOPE1

OUT

OUT

SW

ON

T

T

R

C

I

10

0.7

2

V

V

2 L C

T

T

−

+

−

×

×

× π

−

≥

×

+

× ×

−

(9)

ripple is almost same whether the external ramp

is used or not. Fig.8 shows the simplified circuit

of the skip mode when both the HS-FET and LS-

FET are off.

R1

R2

FB

Figure 8—Simplified Circuit in skip Mode

mode can be determined as follows:

OUT

OUT

REF

2

SLOPE

C

]

R

//

)

2

R

1

R

[(

V

V

×

+

−

=

(10)