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MP8869SGL датащи(PDF) 21 Page - Monolithic Power Systems |
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MP8869SGL датащи(HTML) 21 Page - Monolithic Power Systems |
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21 / 39 page ![]() MP8869S – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER MP8869S Rev. 1.03 www.MonolithicPower.com 21 1/18/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. PG implements an adjustable deglitch time via the I2C whenever VOUT crosses the under- voltage and over-voltage (UV, OV) rising and falling threshold. This guarantees the correct indication when the output voltage is scaled through the I2C. The PG output is pulled low immediately when EN UVLO, input UVLO, OCP, or over- temperature protection (OTP) are triggered. Input Over-Voltage Protection (VIN OVP) The MP8869S monitors VIN to detect an input over-voltage event. This function is active only when the output is in OV or a soft-stop condition. When the output is in the over- voltage protection (OVP) state or soft stop is enabled, output discharge is enabled to charge the input voltage high. When the input voltage exceeds the input OVP threshold, both the HS- FET and LS-FET stop switching. Output Over-Voltage Protection (OVP) The MP8869S monitors both FB and VOUT to detect an over-voltage event. When the FB voltage becomes higher than 125% of the internal reference voltage, an internal comparator monitors FB, and the controller enters dynamic regulation mode. The input voltage may be charged up during this time. When input OVP is triggered, the IC stops switching. If OVP mode is set to auto retry in the I2C, the IC begins switching once the input voltage drops below the VIN OVP recover threshold. Otherwise, the MP8869S latches off. OVP auto-retry mode or latch-off mode occurs only if the soft start has finished. Dynamic regulation mode can be operated by turning on the low side until the low-side negative current limit is triggered. Then the body diode of the HS-FET free-wheels the current. The output power charges the input, which may trigger the VIN OVP function. In VIN OVP, neither the HS-FET or LS-FET turn on and stop charging VIN. If the output is still over-voltage and the input voltage drops below the VIN OVP threshold, repeat the operation. If the output voltage is below 110% of the internal reference voltage, then output OVP is exited. Output Absolute Over-Voltage Protection (OVP_ABS) T he MP8869S’s VOUT can be adjusted by the feedback reference voltage and the external resistor dividers. But MP8869S’s output voltage must be set lower than the absolute OVP threshold (typically 6.5V). The MP8869S monitors VOUT to detect absolute OVP. When VOUT is larger than 6.5V, the controller enters dynamic regulation mode if the OVP retry bit is set to 1 in the I2C register 01. Otherwise, the MP8869S latches off when output OVP and input OVP are both triggered. Absolute OVP works once both the input voltage and EN are higher than their rising thresholds. This means that this function can work even during a soft start. Thermal Shutdown Thermal shutdown prevents the chip from operating at exceedingly high temperatures. When the silicon die reaches temperatures that exceed 160°C, the entire chip shuts down. When the temperature is less than its lower threshold (typically 140°C), the chip is enabled again. The D[1] and D[2] bits can be monitored in register 06 for more information about the IC silicon temperature. Floating Driver and Bootstrap Charging An external bootstrap capacitor powers the floating power MOSFET driver. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 2.4V with a 150mV hysteresis. The bootstrap capacitor voltage is regulated by VIN internally through D1, M1, C4, L1, and C2 (see Figure 6). If VBST - VSW exceeds 3.3V, U1 regulates M1 to maintain a 3.3V BST voltage across C4. VIN D1 M1 3.3V C4 BST SW L1 VOUT C2 U1 Figure 6: Internal Bootstrap Charging Circuit |
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